mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 06:46:41 +07:00
9cf8edb7a3
I get number of CPUs - 1 kmemleak hits like unreferenced object 0x37ec6f000 (size 1024): comm "swapper/0", pid 1, jiffies 4294937330 (age 889.690s) hex dump (first 32 bytes): 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk backtrace: [<000000000034a848>] kmem_cache_alloc+0x2b8/0x3d0 [<00000000001164de>] __cpu_up+0x456/0x488 [<000000000016f60c>] bringup_cpu+0x4c/0xd0 [<000000000016d5d2>] cpuhp_invoke_callback+0xe2/0x9e8 [<000000000016f3c6>] cpuhp_up_callbacks+0x5e/0x110 [<000000000016f988>] _cpu_up+0xe0/0x158 [<000000000016faf0>] do_cpu_up+0xf0/0x110 [<0000000000dae1ee>] smp_init+0x126/0x130 [<0000000000d9bd04>] kernel_init_freeable+0x174/0x2e0 [<000000000089fc62>] kernel_init+0x2a/0x148 [<00000000008adce2>] kernel_thread_starter+0x6/0xc [<00000000008adcdc>] kernel_thread_starter+0x0/0xc [<ffffffffffffffff>] 0xffffffffffffffff The pointer of this data structure is stored in the prefix page of that CPU together with some extra bits ORed into the the low bits. Mark the data structure as non-leak. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
1188 lines
31 KiB
C
1188 lines
31 KiB
C
/*
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* SMP related functions
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*
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* Copyright IBM Corp. 1999, 2012
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* Author(s): Denis Joseph Barrow,
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* Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Heiko Carstens <heiko.carstens@de.ibm.com>,
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*
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* based on other smp stuff by
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* (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
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* (c) 1998 Ingo Molnar
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*
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* The code outside of smp.c uses logical cpu numbers, only smp.c does
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* the translation of logical to physical cpu ids. All new code that
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* operates on physical cpu numbers needs to go into smp.c.
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*/
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#define KMSG_COMPONENT "cpu"
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#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
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#include <linux/workqueue.h>
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#include <linux/bootmem.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/err.h>
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#include <linux/spinlock.h>
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#include <linux/kernel_stat.h>
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#include <linux/kmemleak.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/irqflags.h>
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#include <linux/cpu.h>
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#include <linux/slab.h>
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#include <linux/sched/hotplug.h>
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#include <linux/sched/task_stack.h>
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#include <linux/crash_dump.h>
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#include <linux/memblock.h>
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#include <asm/asm-offsets.h>
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#include <asm/diag.h>
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#include <asm/switch_to.h>
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#include <asm/facility.h>
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#include <asm/ipl.h>
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#include <asm/setup.h>
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#include <asm/irq.h>
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#include <asm/tlbflush.h>
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#include <asm/vtimer.h>
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#include <asm/lowcore.h>
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#include <asm/sclp.h>
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#include <asm/vdso.h>
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#include <asm/debug.h>
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#include <asm/os_info.h>
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#include <asm/sigp.h>
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#include <asm/idle.h>
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#include <asm/nmi.h>
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#include "entry.h"
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enum {
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ec_schedule = 0,
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ec_call_function_single,
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ec_stop_cpu,
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};
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enum {
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CPU_STATE_STANDBY,
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CPU_STATE_CONFIGURED,
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};
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static DEFINE_PER_CPU(struct cpu *, cpu_device);
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struct pcpu {
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struct lowcore *lowcore; /* lowcore page(s) for the cpu */
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unsigned long ec_mask; /* bit mask for ec_xxx functions */
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unsigned long ec_clk; /* sigp timestamp for ec_xxx */
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signed char state; /* physical cpu state */
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signed char polarization; /* physical polarization */
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u16 address; /* physical cpu address */
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};
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static u8 boot_core_type;
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static struct pcpu pcpu_devices[NR_CPUS];
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static struct kmem_cache *pcpu_mcesa_cache;
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unsigned int smp_cpu_mt_shift;
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EXPORT_SYMBOL(smp_cpu_mt_shift);
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unsigned int smp_cpu_mtid;
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EXPORT_SYMBOL(smp_cpu_mtid);
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#ifdef CONFIG_CRASH_DUMP
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__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
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#endif
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static unsigned int smp_max_threads __initdata = -1U;
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static int __init early_nosmt(char *s)
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{
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smp_max_threads = 1;
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return 0;
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}
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early_param("nosmt", early_nosmt);
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static int __init early_smt(char *s)
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{
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get_option(&s, &smp_max_threads);
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return 0;
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}
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early_param("smt", early_smt);
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/*
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* The smp_cpu_state_mutex must be held when changing the state or polarization
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* member of a pcpu data structure within the pcpu_devices arreay.
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*/
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DEFINE_MUTEX(smp_cpu_state_mutex);
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/*
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* Signal processor helper functions.
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*/
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static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
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{
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int cc;
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while (1) {
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cc = __pcpu_sigp(addr, order, parm, NULL);
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if (cc != SIGP_CC_BUSY)
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return cc;
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cpu_relax();
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}
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}
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static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
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{
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int cc, retry;
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for (retry = 0; ; retry++) {
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cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
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if (cc != SIGP_CC_BUSY)
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break;
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if (retry >= 3)
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udelay(10);
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}
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return cc;
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}
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static inline int pcpu_stopped(struct pcpu *pcpu)
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{
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u32 uninitialized_var(status);
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if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
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0, &status) != SIGP_CC_STATUS_STORED)
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return 0;
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return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
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}
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static inline int pcpu_running(struct pcpu *pcpu)
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{
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if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
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0, NULL) != SIGP_CC_STATUS_STORED)
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return 1;
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/* Status stored condition code is equivalent to cpu not running. */
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return 0;
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}
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/*
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* Find struct pcpu by cpu address.
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*/
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static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
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{
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int cpu;
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for_each_cpu(cpu, mask)
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if (pcpu_devices[cpu].address == address)
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return pcpu_devices + cpu;
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return NULL;
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}
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static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
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{
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int order;
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if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
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return;
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order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
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pcpu->ec_clk = get_tod_clock_fast();
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pcpu_sigp_retry(pcpu, order, 0);
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}
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#define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
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#define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
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static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
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{
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unsigned long async_stack, panic_stack;
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unsigned long mcesa_origin, mcesa_bits;
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struct lowcore *lc;
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mcesa_origin = mcesa_bits = 0;
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if (pcpu != &pcpu_devices[0]) {
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pcpu->lowcore = (struct lowcore *)
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__get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
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async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
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panic_stack = __get_free_page(GFP_KERNEL);
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if (!pcpu->lowcore || !panic_stack || !async_stack)
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goto out;
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if (MACHINE_HAS_VX || MACHINE_HAS_GS) {
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mcesa_origin = (unsigned long)
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kmem_cache_alloc(pcpu_mcesa_cache, GFP_KERNEL);
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if (!mcesa_origin)
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goto out;
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/* The pointer is stored with mcesa_bits ORed in */
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kmemleak_not_leak((void *) mcesa_origin);
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mcesa_bits = MACHINE_HAS_GS ? 11 : 0;
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}
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} else {
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async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
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panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
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mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK;
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mcesa_bits = pcpu->lowcore->mcesad & MCESA_LC_MASK;
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}
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lc = pcpu->lowcore;
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memcpy(lc, &S390_lowcore, 512);
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memset((char *) lc + 512, 0, sizeof(*lc) - 512);
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lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
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lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
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lc->mcesad = mcesa_origin | mcesa_bits;
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lc->cpu_nr = cpu;
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lc->spinlock_lockval = arch_spin_lockval(cpu);
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if (vdso_alloc_per_cpu(lc))
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goto out;
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lowcore_ptr[cpu] = lc;
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pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
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return 0;
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out:
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if (pcpu != &pcpu_devices[0]) {
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if (mcesa_origin)
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kmem_cache_free(pcpu_mcesa_cache,
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(void *) mcesa_origin);
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free_page(panic_stack);
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free_pages(async_stack, ASYNC_ORDER);
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free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
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}
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return -ENOMEM;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void pcpu_free_lowcore(struct pcpu *pcpu)
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{
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unsigned long mcesa_origin;
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pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
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lowcore_ptr[pcpu - pcpu_devices] = NULL;
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vdso_free_per_cpu(pcpu->lowcore);
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if (pcpu == &pcpu_devices[0])
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return;
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if (MACHINE_HAS_VX || MACHINE_HAS_GS) {
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mcesa_origin = pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK;
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kmem_cache_free(pcpu_mcesa_cache, (void *) mcesa_origin);
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}
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free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
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free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
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free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
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{
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struct lowcore *lc = pcpu->lowcore;
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cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
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cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
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lc->cpu_nr = cpu;
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lc->spinlock_lockval = arch_spin_lockval(cpu);
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lc->percpu_offset = __per_cpu_offset[cpu];
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lc->kernel_asce = S390_lowcore.kernel_asce;
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lc->machine_flags = S390_lowcore.machine_flags;
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lc->user_timer = lc->system_timer = lc->steal_timer = 0;
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__ctl_store(lc->cregs_save_area, 0, 15);
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save_access_regs((unsigned int *) lc->access_regs_save_area);
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memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
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MAX_FACILITY_BIT/8);
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}
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static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
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{
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struct lowcore *lc = pcpu->lowcore;
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lc->kernel_stack = (unsigned long) task_stack_page(tsk)
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+ THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
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lc->current_task = (unsigned long) tsk;
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lc->lpp = LPP_MAGIC;
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lc->current_pid = tsk->pid;
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lc->user_timer = tsk->thread.user_timer;
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lc->system_timer = tsk->thread.system_timer;
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lc->steal_timer = 0;
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}
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static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
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{
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struct lowcore *lc = pcpu->lowcore;
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lc->restart_stack = lc->kernel_stack;
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lc->restart_fn = (unsigned long) func;
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lc->restart_data = (unsigned long) data;
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lc->restart_source = -1UL;
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pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
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}
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/*
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* Call function via PSW restart on pcpu and stop the current cpu.
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*/
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static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
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void *data, unsigned long stack)
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{
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struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
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unsigned long source_cpu = stap();
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__load_psw_mask(PSW_KERNEL_BITS);
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if (pcpu->address == source_cpu)
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func(data); /* should not return */
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/* Stop target cpu (if func returns this stops the current cpu). */
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pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
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/* Restart func on the target cpu and stop the current cpu. */
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mem_assign_absolute(lc->restart_stack, stack);
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mem_assign_absolute(lc->restart_fn, (unsigned long) func);
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mem_assign_absolute(lc->restart_data, (unsigned long) data);
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mem_assign_absolute(lc->restart_source, source_cpu);
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asm volatile(
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"0: sigp 0,%0,%2 # sigp restart to target cpu\n"
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" brc 2,0b # busy, try again\n"
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"1: sigp 0,%1,%3 # sigp stop to current cpu\n"
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" brc 2,1b # busy, try again\n"
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: : "d" (pcpu->address), "d" (source_cpu),
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"K" (SIGP_RESTART), "K" (SIGP_STOP)
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: "0", "1", "cc");
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for (;;) ;
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}
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/*
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* Enable additional logical cpus for multi-threading.
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*/
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static int pcpu_set_smt(unsigned int mtid)
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{
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int cc;
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if (smp_cpu_mtid == mtid)
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return 0;
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cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
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if (cc == 0) {
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smp_cpu_mtid = mtid;
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smp_cpu_mt_shift = 0;
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while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
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smp_cpu_mt_shift++;
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pcpu_devices[0].address = stap();
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}
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return cc;
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}
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/*
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* Call function on an online CPU.
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*/
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void smp_call_online_cpu(void (*func)(void *), void *data)
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{
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struct pcpu *pcpu;
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/* Use the current cpu if it is online. */
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pcpu = pcpu_find_address(cpu_online_mask, stap());
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if (!pcpu)
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/* Use the first online cpu. */
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pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
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pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
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}
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/*
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* Call function on the ipl CPU.
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*/
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void smp_call_ipl_cpu(void (*func)(void *), void *data)
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{
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pcpu_delegate(&pcpu_devices[0], func, data,
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pcpu_devices->lowcore->panic_stack -
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PANIC_FRAME_OFFSET + PAGE_SIZE);
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}
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int smp_find_processor_id(u16 address)
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{
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int cpu;
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for_each_present_cpu(cpu)
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if (pcpu_devices[cpu].address == address)
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return cpu;
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return -1;
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}
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|
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bool arch_vcpu_is_preempted(int cpu)
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{
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if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
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return false;
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if (pcpu_running(pcpu_devices + cpu))
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return false;
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return true;
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}
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EXPORT_SYMBOL(arch_vcpu_is_preempted);
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|
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void smp_yield_cpu(int cpu)
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{
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if (MACHINE_HAS_DIAG9C) {
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diag_stat_inc_norecursion(DIAG_STAT_X09C);
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asm volatile("diag %0,0,0x9c"
|
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: : "d" (pcpu_devices[cpu].address));
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} else if (MACHINE_HAS_DIAG44) {
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diag_stat_inc_norecursion(DIAG_STAT_X044);
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asm volatile("diag 0,0,0x44");
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}
|
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}
|
|
|
|
/*
|
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* Send cpus emergency shutdown signal. This gives the cpus the
|
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* opportunity to complete outstanding interrupts.
|
|
*/
|
|
static void smp_emergency_stop(cpumask_t *cpumask)
|
|
{
|
|
u64 end;
|
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int cpu;
|
|
|
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end = get_tod_clock() + (1000000UL << 12);
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for_each_cpu(cpu, cpumask) {
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struct pcpu *pcpu = pcpu_devices + cpu;
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set_bit(ec_stop_cpu, &pcpu->ec_mask);
|
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while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
|
|
0, NULL) == SIGP_CC_BUSY &&
|
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get_tod_clock() < end)
|
|
cpu_relax();
|
|
}
|
|
while (get_tod_clock() < end) {
|
|
for_each_cpu(cpu, cpumask)
|
|
if (pcpu_stopped(pcpu_devices + cpu))
|
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cpumask_clear_cpu(cpu, cpumask);
|
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if (cpumask_empty(cpumask))
|
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break;
|
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cpu_relax();
|
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}
|
|
}
|
|
|
|
/*
|
|
* Stop all cpus but the current one.
|
|
*/
|
|
void smp_send_stop(void)
|
|
{
|
|
cpumask_t cpumask;
|
|
int cpu;
|
|
|
|
/* Disable all interrupts/machine checks */
|
|
__load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
|
|
trace_hardirqs_off();
|
|
|
|
debug_set_critical();
|
|
cpumask_copy(&cpumask, cpu_online_mask);
|
|
cpumask_clear_cpu(smp_processor_id(), &cpumask);
|
|
|
|
if (oops_in_progress)
|
|
smp_emergency_stop(&cpumask);
|
|
|
|
/* stop all processors */
|
|
for_each_cpu(cpu, &cpumask) {
|
|
struct pcpu *pcpu = pcpu_devices + cpu;
|
|
pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
|
|
while (!pcpu_stopped(pcpu))
|
|
cpu_relax();
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This is the main routine where commands issued by other
|
|
* cpus are handled.
|
|
*/
|
|
static void smp_handle_ext_call(void)
|
|
{
|
|
unsigned long bits;
|
|
|
|
/* handle bit signal external calls */
|
|
bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
|
|
if (test_bit(ec_stop_cpu, &bits))
|
|
smp_stop_cpu();
|
|
if (test_bit(ec_schedule, &bits))
|
|
scheduler_ipi();
|
|
if (test_bit(ec_call_function_single, &bits))
|
|
generic_smp_call_function_single_interrupt();
|
|
}
|
|
|
|
static void do_ext_call_interrupt(struct ext_code ext_code,
|
|
unsigned int param32, unsigned long param64)
|
|
{
|
|
inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
|
|
smp_handle_ext_call();
|
|
}
|
|
|
|
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
|
{
|
|
int cpu;
|
|
|
|
for_each_cpu(cpu, mask)
|
|
pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
|
|
}
|
|
|
|
void arch_send_call_function_single_ipi(int cpu)
|
|
{
|
|
pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
|
|
}
|
|
|
|
/*
|
|
* this function sends a 'reschedule' IPI to another CPU.
|
|
* it goes straight through and wastes no time serializing
|
|
* anything. Worst case is that we lose a reschedule ...
|
|
*/
|
|
void smp_send_reschedule(int cpu)
|
|
{
|
|
pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
|
|
}
|
|
|
|
/*
|
|
* parameter area for the set/clear control bit callbacks
|
|
*/
|
|
struct ec_creg_mask_parms {
|
|
unsigned long orval;
|
|
unsigned long andval;
|
|
int cr;
|
|
};
|
|
|
|
/*
|
|
* callback for setting/clearing control bits
|
|
*/
|
|
static void smp_ctl_bit_callback(void *info)
|
|
{
|
|
struct ec_creg_mask_parms *pp = info;
|
|
unsigned long cregs[16];
|
|
|
|
__ctl_store(cregs, 0, 15);
|
|
cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
|
|
__ctl_load(cregs, 0, 15);
|
|
}
|
|
|
|
/*
|
|
* Set a bit in a control register of all cpus
|
|
*/
|
|
void smp_ctl_set_bit(int cr, int bit)
|
|
{
|
|
struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
|
|
|
|
on_each_cpu(smp_ctl_bit_callback, &parms, 1);
|
|
}
|
|
EXPORT_SYMBOL(smp_ctl_set_bit);
|
|
|
|
/*
|
|
* Clear a bit in a control register of all cpus
|
|
*/
|
|
void smp_ctl_clear_bit(int cr, int bit)
|
|
{
|
|
struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
|
|
|
|
on_each_cpu(smp_ctl_bit_callback, &parms, 1);
|
|
}
|
|
EXPORT_SYMBOL(smp_ctl_clear_bit);
|
|
|
|
#ifdef CONFIG_CRASH_DUMP
|
|
|
|
int smp_store_status(int cpu)
|
|
{
|
|
struct pcpu *pcpu = pcpu_devices + cpu;
|
|
unsigned long pa;
|
|
|
|
pa = __pa(&pcpu->lowcore->floating_pt_save_area);
|
|
if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
|
|
pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
|
|
return -EIO;
|
|
if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
|
|
return 0;
|
|
pa = __pa(pcpu->lowcore->mcesad & MCESA_ORIGIN_MASK);
|
|
if (MACHINE_HAS_GS)
|
|
pa |= pcpu->lowcore->mcesad & MCESA_LC_MASK;
|
|
if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
|
|
pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
|
|
return -EIO;
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Collect CPU state of the previous, crashed system.
|
|
* There are four cases:
|
|
* 1) standard zfcp dump
|
|
* condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
|
|
* The state for all CPUs except the boot CPU needs to be collected
|
|
* with sigp stop-and-store-status. The boot CPU state is located in
|
|
* the absolute lowcore of the memory stored in the HSA. The zcore code
|
|
* will copy the boot CPU state from the HSA.
|
|
* 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
|
|
* condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
|
|
* The state for all CPUs except the boot CPU needs to be collected
|
|
* with sigp stop-and-store-status. The firmware or the boot-loader
|
|
* stored the registers of the boot CPU in the absolute lowcore in the
|
|
* memory of the old system.
|
|
* 3) kdump and the old kernel did not store the CPU state,
|
|
* or stand-alone kdump for DASD
|
|
* condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
|
|
* The state for all CPUs except the boot CPU needs to be collected
|
|
* with sigp stop-and-store-status. The kexec code or the boot-loader
|
|
* stored the registers of the boot CPU in the memory of the old system.
|
|
* 4) kdump and the old kernel stored the CPU state
|
|
* condition: OLDMEM_BASE != NULL && is_kdump_kernel()
|
|
* This case does not exist for s390 anymore, setup_arch explicitly
|
|
* deactivates the elfcorehdr= kernel parameter
|
|
*/
|
|
static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
|
|
bool is_boot_cpu, unsigned long page)
|
|
{
|
|
__vector128 *vxrs = (__vector128 *) page;
|
|
|
|
if (is_boot_cpu)
|
|
vxrs = boot_cpu_vector_save_area;
|
|
else
|
|
__pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
|
|
save_area_add_vxrs(sa, vxrs);
|
|
}
|
|
|
|
static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
|
|
bool is_boot_cpu, unsigned long page)
|
|
{
|
|
void *regs = (void *) page;
|
|
|
|
if (is_boot_cpu)
|
|
copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
|
|
else
|
|
__pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
|
|
save_area_add_regs(sa, regs);
|
|
}
|
|
|
|
void __init smp_save_dump_cpus(void)
|
|
{
|
|
int addr, boot_cpu_addr, max_cpu_addr;
|
|
struct save_area *sa;
|
|
unsigned long page;
|
|
bool is_boot_cpu;
|
|
|
|
if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
|
|
/* No previous system present, normal boot. */
|
|
return;
|
|
/* Allocate a page as dumping area for the store status sigps */
|
|
page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
|
|
/* Set multi-threading state to the previous system. */
|
|
pcpu_set_smt(sclp.mtid_prev);
|
|
boot_cpu_addr = stap();
|
|
max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
|
|
for (addr = 0; addr <= max_cpu_addr; addr++) {
|
|
if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
|
|
SIGP_CC_NOT_OPERATIONAL)
|
|
continue;
|
|
is_boot_cpu = (addr == boot_cpu_addr);
|
|
/* Allocate save area */
|
|
sa = save_area_alloc(is_boot_cpu);
|
|
if (!sa)
|
|
panic("could not allocate memory for save area\n");
|
|
if (MACHINE_HAS_VX)
|
|
/* Get the vector registers */
|
|
smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
|
|
/*
|
|
* For a zfcp dump OLDMEM_BASE == NULL and the registers
|
|
* of the boot CPU are stored in the HSA. To retrieve
|
|
* these registers an SCLP request is required which is
|
|
* done by drivers/s390/char/zcore.c:init_cpu_info()
|
|
*/
|
|
if (!is_boot_cpu || OLDMEM_BASE)
|
|
/* Get the CPU registers */
|
|
smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
|
|
}
|
|
memblock_free(page, PAGE_SIZE);
|
|
diag308_reset();
|
|
pcpu_set_smt(0);
|
|
}
|
|
#endif /* CONFIG_CRASH_DUMP */
|
|
|
|
void smp_cpu_set_polarization(int cpu, int val)
|
|
{
|
|
pcpu_devices[cpu].polarization = val;
|
|
}
|
|
|
|
int smp_cpu_get_polarization(int cpu)
|
|
{
|
|
return pcpu_devices[cpu].polarization;
|
|
}
|
|
|
|
static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
|
|
{
|
|
static int use_sigp_detection;
|
|
int address;
|
|
|
|
if (use_sigp_detection || sclp_get_core_info(info, early)) {
|
|
use_sigp_detection = 1;
|
|
for (address = 0;
|
|
address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
|
|
address += (1U << smp_cpu_mt_shift)) {
|
|
if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
|
|
SIGP_CC_NOT_OPERATIONAL)
|
|
continue;
|
|
info->core[info->configured].core_id =
|
|
address >> smp_cpu_mt_shift;
|
|
info->configured++;
|
|
}
|
|
info->combined = info->configured;
|
|
}
|
|
}
|
|
|
|
static int smp_add_present_cpu(int cpu);
|
|
|
|
static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
|
|
{
|
|
struct pcpu *pcpu;
|
|
cpumask_t avail;
|
|
int cpu, nr, i, j;
|
|
u16 address;
|
|
|
|
nr = 0;
|
|
cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
|
|
cpu = cpumask_first(&avail);
|
|
for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
|
|
if (sclp.has_core_type && info->core[i].type != boot_core_type)
|
|
continue;
|
|
address = info->core[i].core_id << smp_cpu_mt_shift;
|
|
for (j = 0; j <= smp_cpu_mtid; j++) {
|
|
if (pcpu_find_address(cpu_present_mask, address + j))
|
|
continue;
|
|
pcpu = pcpu_devices + cpu;
|
|
pcpu->address = address + j;
|
|
pcpu->state =
|
|
(cpu >= info->configured*(smp_cpu_mtid + 1)) ?
|
|
CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
|
|
smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
|
|
set_cpu_present(cpu, true);
|
|
if (sysfs_add && smp_add_present_cpu(cpu) != 0)
|
|
set_cpu_present(cpu, false);
|
|
else
|
|
nr++;
|
|
cpu = cpumask_next(cpu, &avail);
|
|
if (cpu >= nr_cpu_ids)
|
|
break;
|
|
}
|
|
}
|
|
return nr;
|
|
}
|
|
|
|
void __init smp_detect_cpus(void)
|
|
{
|
|
unsigned int cpu, mtid, c_cpus, s_cpus;
|
|
struct sclp_core_info *info;
|
|
u16 address;
|
|
|
|
/* Get CPU information */
|
|
info = memblock_virt_alloc(sizeof(*info), 8);
|
|
smp_get_core_info(info, 1);
|
|
/* Find boot CPU type */
|
|
if (sclp.has_core_type) {
|
|
address = stap();
|
|
for (cpu = 0; cpu < info->combined; cpu++)
|
|
if (info->core[cpu].core_id == address) {
|
|
/* The boot cpu dictates the cpu type. */
|
|
boot_core_type = info->core[cpu].type;
|
|
break;
|
|
}
|
|
if (cpu >= info->combined)
|
|
panic("Could not find boot CPU type");
|
|
}
|
|
|
|
/* Set multi-threading state for the current system */
|
|
mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
|
|
mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
|
|
pcpu_set_smt(mtid);
|
|
|
|
/* Print number of CPUs */
|
|
c_cpus = s_cpus = 0;
|
|
for (cpu = 0; cpu < info->combined; cpu++) {
|
|
if (sclp.has_core_type &&
|
|
info->core[cpu].type != boot_core_type)
|
|
continue;
|
|
if (cpu < info->configured)
|
|
c_cpus += smp_cpu_mtid + 1;
|
|
else
|
|
s_cpus += smp_cpu_mtid + 1;
|
|
}
|
|
pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
|
|
|
|
/* Add CPUs present at boot */
|
|
get_online_cpus();
|
|
__smp_rescan_cpus(info, 0);
|
|
put_online_cpus();
|
|
memblock_free_early((unsigned long)info, sizeof(*info));
|
|
}
|
|
|
|
/*
|
|
* Activate a secondary processor.
|
|
*/
|
|
static void smp_start_secondary(void *cpuvoid)
|
|
{
|
|
S390_lowcore.last_update_clock = get_tod_clock();
|
|
S390_lowcore.restart_stack = (unsigned long) restart_stack;
|
|
S390_lowcore.restart_fn = (unsigned long) do_restart;
|
|
S390_lowcore.restart_data = 0;
|
|
S390_lowcore.restart_source = -1UL;
|
|
restore_access_regs(S390_lowcore.access_regs_save_area);
|
|
__ctl_load(S390_lowcore.cregs_save_area, 0, 15);
|
|
__load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
|
|
cpu_init();
|
|
preempt_disable();
|
|
init_cpu_timer();
|
|
vtime_init();
|
|
pfault_init();
|
|
notify_cpu_starting(smp_processor_id());
|
|
set_cpu_online(smp_processor_id(), true);
|
|
inc_irq_stat(CPU_RST);
|
|
local_irq_enable();
|
|
cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
|
|
}
|
|
|
|
/* Upping and downing of CPUs */
|
|
int __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
|
{
|
|
struct pcpu *pcpu;
|
|
int base, i, rc;
|
|
|
|
pcpu = pcpu_devices + cpu;
|
|
if (pcpu->state != CPU_STATE_CONFIGURED)
|
|
return -EIO;
|
|
base = smp_get_base_cpu(cpu);
|
|
for (i = 0; i <= smp_cpu_mtid; i++) {
|
|
if (base + i < nr_cpu_ids)
|
|
if (cpu_online(base + i))
|
|
break;
|
|
}
|
|
/*
|
|
* If this is the first CPU of the core to get online
|
|
* do an initial CPU reset.
|
|
*/
|
|
if (i > smp_cpu_mtid &&
|
|
pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
|
|
SIGP_CC_ORDER_CODE_ACCEPTED)
|
|
return -EIO;
|
|
|
|
rc = pcpu_alloc_lowcore(pcpu, cpu);
|
|
if (rc)
|
|
return rc;
|
|
pcpu_prepare_secondary(pcpu, cpu);
|
|
pcpu_attach_task(pcpu, tidle);
|
|
pcpu_start_fn(pcpu, smp_start_secondary, NULL);
|
|
/* Wait until cpu puts itself in the online & active maps */
|
|
while (!cpu_online(cpu))
|
|
cpu_relax();
|
|
return 0;
|
|
}
|
|
|
|
static unsigned int setup_possible_cpus __initdata;
|
|
|
|
static int __init _setup_possible_cpus(char *s)
|
|
{
|
|
get_option(&s, &setup_possible_cpus);
|
|
return 0;
|
|
}
|
|
early_param("possible_cpus", _setup_possible_cpus);
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
int __cpu_disable(void)
|
|
{
|
|
unsigned long cregs[16];
|
|
|
|
/* Handle possible pending IPIs */
|
|
smp_handle_ext_call();
|
|
set_cpu_online(smp_processor_id(), false);
|
|
/* Disable pseudo page faults on this cpu. */
|
|
pfault_fini();
|
|
/* Disable interrupt sources via control register. */
|
|
__ctl_store(cregs, 0, 15);
|
|
cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
|
|
cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
|
|
cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
|
|
__ctl_load(cregs, 0, 15);
|
|
clear_cpu_flag(CIF_NOHZ_DELAY);
|
|
return 0;
|
|
}
|
|
|
|
void __cpu_die(unsigned int cpu)
|
|
{
|
|
struct pcpu *pcpu;
|
|
|
|
/* Wait until target cpu is down */
|
|
pcpu = pcpu_devices + cpu;
|
|
while (!pcpu_stopped(pcpu))
|
|
cpu_relax();
|
|
pcpu_free_lowcore(pcpu);
|
|
cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
|
|
cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
|
|
}
|
|
|
|
void __noreturn cpu_die(void)
|
|
{
|
|
idle_task_exit();
|
|
pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
|
|
for (;;) ;
|
|
}
|
|
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
|
|
|
void __init smp_fill_possible_mask(void)
|
|
{
|
|
unsigned int possible, sclp_max, cpu;
|
|
|
|
sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
|
|
sclp_max = min(smp_max_threads, sclp_max);
|
|
sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
|
|
possible = setup_possible_cpus ?: nr_cpu_ids;
|
|
possible = min(possible, sclp_max);
|
|
for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
|
|
set_cpu_possible(cpu, true);
|
|
}
|
|
|
|
void __init smp_prepare_cpus(unsigned int max_cpus)
|
|
{
|
|
unsigned long size;
|
|
|
|
/* request the 0x1201 emergency signal external interrupt */
|
|
if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
|
|
panic("Couldn't request external interrupt 0x1201");
|
|
/* request the 0x1202 external call external interrupt */
|
|
if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
|
|
panic("Couldn't request external interrupt 0x1202");
|
|
/* create slab cache for the machine-check-extended-save-areas */
|
|
if (MACHINE_HAS_VX || MACHINE_HAS_GS) {
|
|
size = 1UL << (MACHINE_HAS_GS ? 11 : 10);
|
|
pcpu_mcesa_cache = kmem_cache_create("nmi_save_areas",
|
|
size, size, 0, NULL);
|
|
if (!pcpu_mcesa_cache)
|
|
panic("Couldn't create nmi save area cache");
|
|
}
|
|
}
|
|
|
|
void __init smp_prepare_boot_cpu(void)
|
|
{
|
|
struct pcpu *pcpu = pcpu_devices;
|
|
|
|
WARN_ON(!cpu_present(0) || !cpu_online(0));
|
|
pcpu->state = CPU_STATE_CONFIGURED;
|
|
pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
|
|
S390_lowcore.percpu_offset = __per_cpu_offset[0];
|
|
smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
|
|
}
|
|
|
|
void __init smp_cpus_done(unsigned int max_cpus)
|
|
{
|
|
}
|
|
|
|
void __init smp_setup_processor_id(void)
|
|
{
|
|
pcpu_devices[0].address = stap();
|
|
S390_lowcore.cpu_nr = 0;
|
|
S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
|
|
}
|
|
|
|
/*
|
|
* the frequency of the profiling timer can be changed
|
|
* by writing a multiplier value into /proc/profile.
|
|
*
|
|
* usually you want to run this on all CPUs ;)
|
|
*/
|
|
int setup_profiling_timer(unsigned int multiplier)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
static ssize_t cpu_configure_show(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
ssize_t count;
|
|
|
|
mutex_lock(&smp_cpu_state_mutex);
|
|
count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
|
|
mutex_unlock(&smp_cpu_state_mutex);
|
|
return count;
|
|
}
|
|
|
|
static ssize_t cpu_configure_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct pcpu *pcpu;
|
|
int cpu, val, rc, i;
|
|
char delim;
|
|
|
|
if (sscanf(buf, "%d %c", &val, &delim) != 1)
|
|
return -EINVAL;
|
|
if (val != 0 && val != 1)
|
|
return -EINVAL;
|
|
get_online_cpus();
|
|
mutex_lock(&smp_cpu_state_mutex);
|
|
rc = -EBUSY;
|
|
/* disallow configuration changes of online cpus and cpu 0 */
|
|
cpu = dev->id;
|
|
cpu = smp_get_base_cpu(cpu);
|
|
if (cpu == 0)
|
|
goto out;
|
|
for (i = 0; i <= smp_cpu_mtid; i++)
|
|
if (cpu_online(cpu + i))
|
|
goto out;
|
|
pcpu = pcpu_devices + cpu;
|
|
rc = 0;
|
|
switch (val) {
|
|
case 0:
|
|
if (pcpu->state != CPU_STATE_CONFIGURED)
|
|
break;
|
|
rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
|
|
if (rc)
|
|
break;
|
|
for (i = 0; i <= smp_cpu_mtid; i++) {
|
|
if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
|
|
continue;
|
|
pcpu[i].state = CPU_STATE_STANDBY;
|
|
smp_cpu_set_polarization(cpu + i,
|
|
POLARIZATION_UNKNOWN);
|
|
}
|
|
topology_expect_change();
|
|
break;
|
|
case 1:
|
|
if (pcpu->state != CPU_STATE_STANDBY)
|
|
break;
|
|
rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
|
|
if (rc)
|
|
break;
|
|
for (i = 0; i <= smp_cpu_mtid; i++) {
|
|
if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
|
|
continue;
|
|
pcpu[i].state = CPU_STATE_CONFIGURED;
|
|
smp_cpu_set_polarization(cpu + i,
|
|
POLARIZATION_UNKNOWN);
|
|
}
|
|
topology_expect_change();
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
out:
|
|
mutex_unlock(&smp_cpu_state_mutex);
|
|
put_online_cpus();
|
|
return rc ? rc : count;
|
|
}
|
|
static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
|
|
|
static ssize_t show_cpu_address(struct device *dev,
|
|
struct device_attribute *attr, char *buf)
|
|
{
|
|
return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
|
|
}
|
|
static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
|
|
|
|
static struct attribute *cpu_common_attrs[] = {
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
&dev_attr_configure.attr,
|
|
#endif
|
|
&dev_attr_address.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group cpu_common_attr_group = {
|
|
.attrs = cpu_common_attrs,
|
|
};
|
|
|
|
static struct attribute *cpu_online_attrs[] = {
|
|
&dev_attr_idle_count.attr,
|
|
&dev_attr_idle_time_us.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group cpu_online_attr_group = {
|
|
.attrs = cpu_online_attrs,
|
|
};
|
|
|
|
static int smp_cpu_online(unsigned int cpu)
|
|
{
|
|
struct device *s = &per_cpu(cpu_device, cpu)->dev;
|
|
|
|
return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
|
|
}
|
|
static int smp_cpu_pre_down(unsigned int cpu)
|
|
{
|
|
struct device *s = &per_cpu(cpu_device, cpu)->dev;
|
|
|
|
sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
|
|
return 0;
|
|
}
|
|
|
|
static int smp_add_present_cpu(int cpu)
|
|
{
|
|
struct device *s;
|
|
struct cpu *c;
|
|
int rc;
|
|
|
|
c = kzalloc(sizeof(*c), GFP_KERNEL);
|
|
if (!c)
|
|
return -ENOMEM;
|
|
per_cpu(cpu_device, cpu) = c;
|
|
s = &c->dev;
|
|
c->hotpluggable = 1;
|
|
rc = register_cpu(c, cpu);
|
|
if (rc)
|
|
goto out;
|
|
rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
|
|
if (rc)
|
|
goto out_cpu;
|
|
rc = topology_cpu_init(c);
|
|
if (rc)
|
|
goto out_topology;
|
|
return 0;
|
|
|
|
out_topology:
|
|
sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
|
|
out_cpu:
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
unregister_cpu(c);
|
|
#endif
|
|
out:
|
|
return rc;
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
|
|
int __ref smp_rescan_cpus(void)
|
|
{
|
|
struct sclp_core_info *info;
|
|
int nr;
|
|
|
|
info = kzalloc(sizeof(*info), GFP_KERNEL);
|
|
if (!info)
|
|
return -ENOMEM;
|
|
smp_get_core_info(info, 0);
|
|
get_online_cpus();
|
|
mutex_lock(&smp_cpu_state_mutex);
|
|
nr = __smp_rescan_cpus(info, 1);
|
|
mutex_unlock(&smp_cpu_state_mutex);
|
|
put_online_cpus();
|
|
kfree(info);
|
|
if (nr)
|
|
topology_schedule_update();
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t __ref rescan_store(struct device *dev,
|
|
struct device_attribute *attr,
|
|
const char *buf,
|
|
size_t count)
|
|
{
|
|
int rc;
|
|
|
|
rc = smp_rescan_cpus();
|
|
return rc ? rc : count;
|
|
}
|
|
static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
|
|
#endif /* CONFIG_HOTPLUG_CPU */
|
|
|
|
static int __init s390_smp_init(void)
|
|
{
|
|
int cpu, rc = 0;
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
|
|
if (rc)
|
|
return rc;
|
|
#endif
|
|
for_each_present_cpu(cpu) {
|
|
rc = smp_add_present_cpu(cpu);
|
|
if (rc)
|
|
goto out;
|
|
}
|
|
|
|
rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
|
|
smp_cpu_online, smp_cpu_pre_down);
|
|
out:
|
|
return rc;
|
|
}
|
|
subsys_initcall(s390_smp_init);
|