mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-24 08:36:27 +07:00
09b25812db
The pipe has a special HDR mode with higher precision when only HDR planes are active. Let's use it. Curiously this fixes the kms_color gamma/degamma tests when using a HDR plane, which is always the case unless one hacks the test to use an SDR plane. If one does hack the test to use an SDR plane it does pass already. I have no actual explanation how the output after the gamma LUT can be different between the two modes. The way the tests are written should mean that the output should be identical between the solid color vs. the gradient. But clearly that somehow doesn't hold true for the HDR planes in non-HDR pipe mode. Anyways, as long as we stick to one type of plane the test should produce sensible results now. v2: s/HDR_MODE/HDR_MODE_PRECISION/ (Shashank) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190412183009.8237-2-ville.syrjala@linux.intel.com Reviewed-by: Uma Shankar <uma.shankar@intel.com> Tested-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Shashank Sharma <shashank.sharma@intel.com>
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/* SPDX-License-Identifier: MIT */
|
|
/*
|
|
* Copyright © 2019 Intel Corporation
|
|
*/
|
|
|
|
#ifndef __INTEL_SPRITE_H__
|
|
#define __INTEL_SPRITE_H__
|
|
|
|
#include <linux/types.h>
|
|
|
|
#include "i915_drv.h"
|
|
#include "intel_display.h"
|
|
|
|
struct drm_device;
|
|
struct drm_display_mode;
|
|
struct drm_file;
|
|
struct drm_i915_private;
|
|
struct intel_crtc_state;
|
|
struct intel_plane_state;
|
|
|
|
bool is_planar_yuv_format(u32 pixelformat);
|
|
int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
|
|
int usecs);
|
|
struct intel_plane *intel_sprite_plane_create(struct drm_i915_private *dev_priv,
|
|
enum pipe pipe, int plane);
|
|
int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
|
|
struct drm_file *file_priv);
|
|
void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state);
|
|
void intel_pipe_update_end(struct intel_crtc_state *new_crtc_state);
|
|
int intel_plane_check_stride(const struct intel_plane_state *plane_state);
|
|
int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state);
|
|
int chv_plane_check_rotation(const struct intel_plane_state *plane_state);
|
|
struct intel_plane *
|
|
skl_universal_plane_create(struct drm_i915_private *dev_priv,
|
|
enum pipe pipe, enum plane_id plane_id);
|
|
|
|
static inline bool icl_is_nv12_y_plane(enum plane_id id)
|
|
{
|
|
/* Don't need to do a gen check, these planes are only available on gen11 */
|
|
if (id == PLANE_SPRITE4 || id == PLANE_SPRITE5)
|
|
return true;
|
|
|
|
return false;
|
|
}
|
|
|
|
static inline u8 icl_hdr_plane_mask(void)
|
|
{
|
|
return BIT(PLANE_PRIMARY) |
|
|
BIT(PLANE_SPRITE0) | BIT(PLANE_SPRITE1);
|
|
}
|
|
|
|
static inline bool icl_is_hdr_plane(struct drm_i915_private *dev_priv,
|
|
enum plane_id plane_id)
|
|
{
|
|
return INTEL_GEN(dev_priv) >= 11 &&
|
|
icl_hdr_plane_mask() & BIT(plane_id);
|
|
}
|
|
|
|
#endif /* __INTEL_SPRITE_H__ */
|