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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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86effd0dc6
This uses a new set of annoations viz. ENTRY_CFI/END_CFI to enabel cfi
ops generation.
Note that we didn't change the normal ENTRY/EXIT as we don't actually
want unwind info in the trap/exception/interrutp handlers which use
these, as unwinder then gets confused (it keeps recursing vs. stopping).
Semantically these are leaf routines and unwinding should stop when it
hits those routines.
Before
------
28.52% 1.19% 9929 hackbench libuClibc-1.0.17.so [.] __write_nocancel
|
---__write_nocancel
|--8.95%--EV_Trap
| --8.25%--sys_write
| |--3.93%--sock_write_iter
...
|--2.62%--memset <==== [LEAF entry as no unwind info]
^^^^^^
After
-----
29.46% 1.24% 13622 hackbench libuClibc-1.0.17.so [.] __write_nocancel
|
---__write_nocancel
|--9.31%--EV_Trap
| --8.62%--sys_write
| |--4.17%--sock_write_iter
...
|--6.19%--sys_write
| --6.19%--sock_write_iter
| unix_stream_sendmsg
| |--1.62%--sock_alloc_send_pskb
| |--0.89%--sock_def_readable
| |--0.88%--_raw_spin_unlock_irqrestore
| |--0.69%--memset
| | ^^^^^^ <==== [now in proper callframe]
| |
| --0.52%--skb_copy_datagram_from_iter
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
84 lines
1.4 KiB
ArmAsm
84 lines
1.4 KiB
ArmAsm
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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ENTRY_CFI(strlen)
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or r3,r0,7
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ld r2,[r3,-7]
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ld.a r6,[r3,-3]
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mov r4,0x01010101
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; uses long immediate
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#ifdef __LITTLE_ENDIAN__
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asl_s r1,r0,3
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btst_s r0,2
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asl r7,r4,r1
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ror r5,r4
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sub r1,r2,r7
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bic_s r1,r1,r2
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mov.eq r7,r4
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sub r12,r6,r7
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bic r12,r12,r6
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or.eq r12,r12,r1
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and r12,r12,r5
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brne r12,0,.Learly_end
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#else /* BIG ENDIAN */
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ror r5,r4
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btst_s r0,2
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mov_s r1,31
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sub3 r7,r1,r0
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sub r1,r2,r4
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bic_s r1,r1,r2
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bmsk r1,r1,r7
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sub r12,r6,r4
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bic r12,r12,r6
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bmsk.ne r12,r12,r7
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or.eq r12,r12,r1
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and r12,r12,r5
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brne r12,0,.Learly_end
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#endif /* ENDIAN */
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.Loop:
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ld_s r2,[r3,4]
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ld.a r6,[r3,8]
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; stall for load result
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sub r1,r2,r4
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bic_s r1,r1,r2
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sub r12,r6,r4
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bic r12,r12,r6
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or r12,r12,r1
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and r12,r12,r5
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breq r12,0,.Loop
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.Lend:
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and.f r1,r1,r5
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sub.ne r3,r3,4
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mov.eq r1,r12
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#ifdef __LITTLE_ENDIAN__
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sub_s r2,r1,1
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bic_s r2,r2,r1
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norm r1,r2
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sub_s r0,r0,3
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lsr_s r1,r1,3
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sub r0,r3,r0
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j_s.d [blink]
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sub r0,r0,r1
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#else /* BIG ENDIAN */
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lsr_s r1,r1,7
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mov.eq r2,r6
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bic_s r1,r1,r2
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norm r1,r1
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sub r0,r3,r0
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lsr_s r1,r1,3
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j_s.d [blink]
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add r0,r0,r1
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#endif /* ENDIAN */
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.Learly_end:
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b.d .Lend
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sub_s.ne r1,r1,r1
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END_CFI(strlen)
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