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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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5d77aa07bd
According to internal documents I found for CMP PCHs the PCI ID 0xA3C1 belongs to a CMP-V chipset. Based on the same docs the programming of the PCH is compatible with that of KBP. Fix up my previous wrong assumption accordingly using the SPT programming which in turn is the basis for KBP. The original bug reporter verified that this is the correct PCH identification (the only way we'll program valid DDC pin-pair values to the GMBUS register) and the Windows team uses the same identification (that is using the KBP programming model for this PCH). I filed the necessary Bspec update requests (BSpec/33734). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112051 Fixes:37c92dc303
("drm/i915: Add new CNL PCH ID seen on a CML platform") Reported-and-tested-by: Cyrus <cyrus.lien@canonical.com> Cc: Cyrus <cyrus.lien@canonical.com> Cc: Timo Aaltonen <tjaalton@ubuntu.com> Cc: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191112104608.24587-1-imre.deak@intel.com (cherry picked from commit50a5065f44
) Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
214 lines
6.8 KiB
C
214 lines
6.8 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright 2019 Intel Corporation.
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*/
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#include "i915_drv.h"
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#include "intel_pch.h"
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/* Map PCH device id to PCH type, or PCH_NONE if unknown. */
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static enum intel_pch
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intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
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{
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switch (id) {
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case INTEL_PCH_IBX_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
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WARN_ON(!IS_GEN(dev_priv, 5));
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return PCH_IBX;
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case INTEL_PCH_CPT_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found CougarPoint PCH\n");
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WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
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return PCH_CPT;
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case INTEL_PCH_PPT_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found PantherPoint PCH\n");
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WARN_ON(!IS_GEN(dev_priv, 6) && !IS_IVYBRIDGE(dev_priv));
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/* PantherPoint is CPT compatible */
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return PCH_CPT;
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case INTEL_PCH_LPT_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found LynxPoint PCH\n");
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WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
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WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
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return PCH_LPT;
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case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
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WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
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WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
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return PCH_LPT;
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case INTEL_PCH_WPT_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found WildcatPoint PCH\n");
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WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
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WARN_ON(IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
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/* WildcatPoint is LPT compatible */
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return PCH_LPT;
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case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found WildcatPoint LP PCH\n");
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WARN_ON(!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
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WARN_ON(!IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
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/* WildcatPoint is LPT compatible */
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return PCH_LPT;
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case INTEL_PCH_SPT_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found SunrisePoint PCH\n");
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WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
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return PCH_SPT;
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case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found SunrisePoint LP PCH\n");
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WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
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!IS_COFFEELAKE(dev_priv));
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return PCH_SPT;
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case INTEL_PCH_KBP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Kaby Lake PCH (KBP)\n");
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WARN_ON(!IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv) &&
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!IS_COFFEELAKE(dev_priv));
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/* KBP is SPT compatible */
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return PCH_SPT;
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case INTEL_PCH_CNP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Cannon Lake PCH (CNP)\n");
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WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
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return PCH_CNP;
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case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Cannon Lake LP PCH (CNP-LP)\n");
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WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv));
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return PCH_CNP;
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case INTEL_PCH_CMP_DEVICE_ID_TYPE:
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case INTEL_PCH_CMP2_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n");
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WARN_ON(!IS_COFFEELAKE(dev_priv));
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/* CometPoint is CNP Compatible */
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return PCH_CNP;
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case INTEL_PCH_CMP_V_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Comet Lake V PCH (CMP-V)\n");
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WARN_ON(!IS_COFFEELAKE(dev_priv));
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/* Comet Lake V PCH is based on KBP, which is SPT compatible */
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return PCH_SPT;
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case INTEL_PCH_ICP_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Ice Lake PCH\n");
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WARN_ON(!IS_ICELAKE(dev_priv));
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return PCH_ICP;
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case INTEL_PCH_MCC_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Mule Creek Canyon PCH\n");
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WARN_ON(!IS_ELKHARTLAKE(dev_priv));
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return PCH_MCC;
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case INTEL_PCH_TGP_DEVICE_ID_TYPE:
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case INTEL_PCH_TGP2_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Tiger Lake LP PCH\n");
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WARN_ON(!IS_TIGERLAKE(dev_priv));
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return PCH_TGP;
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case INTEL_PCH_JSP_DEVICE_ID_TYPE:
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case INTEL_PCH_JSP2_DEVICE_ID_TYPE:
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DRM_DEBUG_KMS("Found Jasper Lake PCH\n");
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WARN_ON(!IS_ELKHARTLAKE(dev_priv));
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return PCH_JSP;
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default:
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return PCH_NONE;
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}
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}
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static bool intel_is_virt_pch(unsigned short id,
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unsigned short svendor, unsigned short sdevice)
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{
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return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
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id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
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(id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
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svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
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sdevice == PCI_SUBDEVICE_ID_QEMU));
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}
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static unsigned short
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intel_virt_detect_pch(const struct drm_i915_private *dev_priv)
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{
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unsigned short id = 0;
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/*
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* In a virtualized passthrough environment we can be in a
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* setup where the ISA bridge is not able to be passed through.
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* In this case, a south bridge can be emulated and we have to
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* make an educated guess as to which PCH is really there.
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*/
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if (IS_TIGERLAKE(dev_priv))
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id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
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else if (IS_ELKHARTLAKE(dev_priv))
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id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
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else if (IS_ICELAKE(dev_priv))
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id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
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else if (IS_CANNONLAKE(dev_priv) || IS_COFFEELAKE(dev_priv))
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id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
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else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
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id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
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else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
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id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
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else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
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id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
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else if (IS_GEN(dev_priv, 6) || IS_IVYBRIDGE(dev_priv))
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id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
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else if (IS_GEN(dev_priv, 5))
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id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
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if (id)
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DRM_DEBUG_KMS("Assuming PCH ID %04x\n", id);
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else
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DRM_DEBUG_KMS("Assuming no PCH\n");
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return id;
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}
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void intel_detect_pch(struct drm_i915_private *dev_priv)
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{
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struct pci_dev *pch = NULL;
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/*
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* The reason to probe ISA bridge instead of Dev31:Fun0 is to
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* make graphics device passthrough work easy for VMM, that only
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* need to expose ISA bridge to let driver know the real hardware
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* underneath. This is a requirement from virtualization team.
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*
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* In some virtualized environments (e.g. XEN), there is irrelevant
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* ISA bridge in the system. To work reliably, we should scan trhough
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* all the ISA bridge devices and check for the first match, instead
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* of only checking the first one.
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*/
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while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
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unsigned short id;
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enum intel_pch pch_type;
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if (pch->vendor != PCI_VENDOR_ID_INTEL)
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continue;
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id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
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pch_type = intel_pch_type(dev_priv, id);
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if (pch_type != PCH_NONE) {
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dev_priv->pch_type = pch_type;
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dev_priv->pch_id = id;
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break;
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} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
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pch->subsystem_device)) {
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id = intel_virt_detect_pch(dev_priv);
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pch_type = intel_pch_type(dev_priv, id);
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/* Sanity check virtual PCH id */
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if (WARN_ON(id && pch_type == PCH_NONE))
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id = 0;
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dev_priv->pch_type = pch_type;
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dev_priv->pch_id = id;
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break;
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}
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}
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/*
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* Use PCH_NOP (PCH but no South Display) for PCH platforms without
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* display.
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*/
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if (pch && !HAS_DISPLAY(dev_priv)) {
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DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
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dev_priv->pch_type = PCH_NOP;
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dev_priv->pch_id = 0;
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}
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if (!pch)
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DRM_DEBUG_KMS("No PCH found.\n");
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pci_dev_put(pch);
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}
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