mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 23:46:41 +07:00
60a1f02c9e
To aid the developer when something triggers an unexpected exception, decode the ESR_ELx.EC field when logging an ESR_ELx value. This doesn't tell the developer the specifics of the exception encoded in the remaining IL and ISS bits, but it can be helpful to distinguish between exception classes (e.g. SError and a data abort) without having to manually decode the field, which can be tiresome. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Will Deacon <will.deacon@arm.com>
467 lines
11 KiB
C
467 lines
11 KiB
C
/*
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* Based on arch/arm/kernel/traps.c
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*
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* Copyright (C) 1995-2009 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/signal.h>
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#include <linux/personality.h>
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#include <linux/kallsyms.h>
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#include <linux/spinlock.h>
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#include <linux/uaccess.h>
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#include <linux/hardirq.h>
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#include <linux/kdebug.h>
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#include <linux/module.h>
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#include <linux/kexec.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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#include <linux/syscalls.h>
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#include <asm/atomic.h>
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#include <asm/debug-monitors.h>
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#include <asm/esr.h>
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#include <asm/traps.h>
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#include <asm/stacktrace.h>
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#include <asm/exception.h>
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#include <asm/system_misc.h>
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static const char *handler[]= {
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"Synchronous Abort",
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"IRQ",
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"FIQ",
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"Error"
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};
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int show_unhandled_signals = 1;
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/*
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* Dump out the contents of some memory nicely...
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*/
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static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
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unsigned long top)
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{
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unsigned long first;
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mm_segment_t fs;
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int i;
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/*
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* We need to switch to kernel mode so that we can use __get_user
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* to safely read from kernel space. Note that we now dump the
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* code first, just in case the backtrace kills us.
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*/
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fs = get_fs();
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set_fs(KERNEL_DS);
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printk("%s%s(0x%016lx to 0x%016lx)\n", lvl, str, bottom, top);
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for (first = bottom & ~31; first < top; first += 32) {
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unsigned long p;
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char str[sizeof(" 12345678") * 8 + 1];
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memset(str, ' ', sizeof(str));
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str[sizeof(str) - 1] = '\0';
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for (p = first, i = 0; i < 8 && p < top; i++, p += 4) {
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if (p >= bottom && p < top) {
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unsigned int val;
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if (__get_user(val, (unsigned int *)p) == 0)
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sprintf(str + i * 9, " %08x", val);
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else
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sprintf(str + i * 9, " ????????");
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}
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}
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printk("%s%04lx:%s\n", lvl, first & 0xffff, str);
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}
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set_fs(fs);
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}
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static void dump_backtrace_entry(unsigned long where, unsigned long stack)
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{
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print_ip_sym(where);
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if (in_exception_text(where))
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dump_mem("", "Exception stack", stack,
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stack + sizeof(struct pt_regs));
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}
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static void dump_instr(const char *lvl, struct pt_regs *regs)
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{
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unsigned long addr = instruction_pointer(regs);
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mm_segment_t fs;
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char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
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int i;
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/*
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* We need to switch to kernel mode so that we can use __get_user
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* to safely read from kernel space. Note that we now dump the
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* code first, just in case the backtrace kills us.
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*/
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fs = get_fs();
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set_fs(KERNEL_DS);
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for (i = -4; i < 1; i++) {
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unsigned int val, bad;
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bad = __get_user(val, &((u32 *)addr)[i]);
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if (!bad)
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p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);
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else {
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p += sprintf(p, "bad PC value");
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break;
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}
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}
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printk("%sCode: %s\n", lvl, str);
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set_fs(fs);
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}
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static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
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{
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struct stackframe frame;
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pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
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if (!tsk)
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tsk = current;
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if (regs) {
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frame.fp = regs->regs[29];
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frame.sp = regs->sp;
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frame.pc = regs->pc;
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} else if (tsk == current) {
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frame.fp = (unsigned long)__builtin_frame_address(0);
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frame.sp = current_stack_pointer;
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frame.pc = (unsigned long)dump_backtrace;
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} else {
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/*
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* task blocked in __switch_to
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*/
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frame.fp = thread_saved_fp(tsk);
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frame.sp = thread_saved_sp(tsk);
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frame.pc = thread_saved_pc(tsk);
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}
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pr_emerg("Call trace:\n");
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while (1) {
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unsigned long where = frame.pc;
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int ret;
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ret = unwind_frame(&frame);
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if (ret < 0)
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break;
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dump_backtrace_entry(where, frame.sp);
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}
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}
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void show_stack(struct task_struct *tsk, unsigned long *sp)
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{
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dump_backtrace(NULL, tsk);
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barrier();
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}
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#ifdef CONFIG_PREEMPT
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#define S_PREEMPT " PREEMPT"
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#else
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#define S_PREEMPT ""
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#endif
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#ifdef CONFIG_SMP
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#define S_SMP " SMP"
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#else
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#define S_SMP ""
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#endif
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static int __die(const char *str, int err, struct thread_info *thread,
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struct pt_regs *regs)
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{
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struct task_struct *tsk = thread->task;
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static int die_counter;
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int ret;
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pr_emerg("Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n",
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str, err, ++die_counter);
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/* trap and error numbers are mostly meaningless on ARM */
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ret = notify_die(DIE_OOPS, str, regs, err, 0, SIGSEGV);
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if (ret == NOTIFY_STOP)
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return ret;
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print_modules();
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__show_regs(regs);
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pr_emerg("Process %.*s (pid: %d, stack limit = 0x%p)\n",
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TASK_COMM_LEN, tsk->comm, task_pid_nr(tsk), thread + 1);
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if (!user_mode(regs) || in_interrupt()) {
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dump_mem(KERN_EMERG, "Stack: ", regs->sp,
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THREAD_SIZE + (unsigned long)task_stack_page(tsk));
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dump_backtrace(regs, tsk);
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dump_instr(KERN_EMERG, regs);
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}
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return ret;
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}
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static DEFINE_RAW_SPINLOCK(die_lock);
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/*
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* This function is protected against re-entrancy.
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*/
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void die(const char *str, struct pt_regs *regs, int err)
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{
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struct thread_info *thread = current_thread_info();
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int ret;
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oops_enter();
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raw_spin_lock_irq(&die_lock);
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console_verbose();
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bust_spinlocks(1);
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ret = __die(str, err, thread, regs);
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if (regs && kexec_should_crash(thread->task))
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crash_kexec(regs);
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bust_spinlocks(0);
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add_taint(TAINT_DIE, LOCKDEP_NOW_UNRELIABLE);
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raw_spin_unlock_irq(&die_lock);
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oops_exit();
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if (in_interrupt())
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panic("Fatal exception in interrupt");
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if (panic_on_oops)
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panic("Fatal exception");
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if (ret != NOTIFY_STOP)
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do_exit(SIGSEGV);
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}
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void arm64_notify_die(const char *str, struct pt_regs *regs,
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struct siginfo *info, int err)
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{
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if (user_mode(regs)) {
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current->thread.fault_address = 0;
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current->thread.fault_code = err;
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force_sig_info(info->si_signo, info, current);
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} else {
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die(str, regs, err);
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}
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}
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static LIST_HEAD(undef_hook);
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static DEFINE_RAW_SPINLOCK(undef_lock);
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void register_undef_hook(struct undef_hook *hook)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_add(&hook->node, &undef_hook);
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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}
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void unregister_undef_hook(struct undef_hook *hook)
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{
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unsigned long flags;
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_del(&hook->node);
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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}
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static int call_undef_hook(struct pt_regs *regs)
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{
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struct undef_hook *hook;
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unsigned long flags;
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u32 instr;
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int (*fn)(struct pt_regs *regs, u32 instr) = NULL;
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void __user *pc = (void __user *)instruction_pointer(regs);
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if (!user_mode(regs))
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return 1;
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if (compat_thumb_mode(regs)) {
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/* 16-bit Thumb instruction */
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if (get_user(instr, (u16 __user *)pc))
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goto exit;
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instr = le16_to_cpu(instr);
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if (aarch32_insn_is_wide(instr)) {
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u32 instr2;
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if (get_user(instr2, (u16 __user *)(pc + 2)))
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goto exit;
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instr2 = le16_to_cpu(instr2);
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instr = (instr << 16) | instr2;
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}
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} else {
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/* 32-bit ARM instruction */
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if (get_user(instr, (u32 __user *)pc))
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goto exit;
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instr = le32_to_cpu(instr);
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}
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raw_spin_lock_irqsave(&undef_lock, flags);
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list_for_each_entry(hook, &undef_hook, node)
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if ((instr & hook->instr_mask) == hook->instr_val &&
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(regs->pstate & hook->pstate_mask) == hook->pstate_val)
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fn = hook->fn;
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raw_spin_unlock_irqrestore(&undef_lock, flags);
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exit:
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return fn ? fn(regs, instr) : 1;
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}
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asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
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{
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siginfo_t info;
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void __user *pc = (void __user *)instruction_pointer(regs);
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/* check for AArch32 breakpoint instructions */
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if (!aarch32_break_handler(regs))
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return;
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if (call_undef_hook(regs) == 0)
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return;
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if (show_unhandled_signals && unhandled_signal(current, SIGILL) &&
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printk_ratelimit()) {
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pr_info("%s[%d]: undefined instruction: pc=%p\n",
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current->comm, task_pid_nr(current), pc);
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dump_instr(KERN_INFO, regs);
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}
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info.si_signo = SIGILL;
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info.si_errno = 0;
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info.si_code = ILL_ILLOPC;
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info.si_addr = pc;
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arm64_notify_die("Oops - undefined instruction", regs, &info, 0);
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}
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long compat_arm_syscall(struct pt_regs *regs);
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asmlinkage long do_ni_syscall(struct pt_regs *regs)
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{
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#ifdef CONFIG_COMPAT
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long ret;
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if (is_compat_task()) {
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ret = compat_arm_syscall(regs);
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if (ret != -ENOSYS)
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return ret;
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}
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#endif
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if (show_unhandled_signals && printk_ratelimit()) {
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pr_info("%s[%d]: syscall %d\n", current->comm,
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task_pid_nr(current), (int)regs->syscallno);
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dump_instr("", regs);
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if (user_mode(regs))
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__show_regs(regs);
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}
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return sys_ni_syscall();
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}
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static const char *esr_class_str[] = {
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[0 ... ESR_ELx_EC_MAX] = "UNRECOGNIZED EC",
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[ESR_ELx_EC_UNKNOWN] = "Unknown/Uncategorized",
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[ESR_ELx_EC_WFx] = "WFI/WFE",
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[ESR_ELx_EC_CP15_32] = "CP15 MCR/MRC",
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[ESR_ELx_EC_CP15_64] = "CP15 MCRR/MRRC",
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[ESR_ELx_EC_CP14_MR] = "CP14 MCR/MRC",
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[ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
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[ESR_ELx_EC_FP_ASIMD] = "ASIMD",
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[ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
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[ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
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[ESR_ELx_EC_ILL] = "PSTATE.IL",
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[ESR_ELx_EC_SVC32] = "SVC (AArch32)",
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[ESR_ELx_EC_HVC32] = "HVC (AArch32)",
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[ESR_ELx_EC_SMC32] = "SMC (AArch32)",
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[ESR_ELx_EC_SVC64] = "SVC (AArch64)",
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[ESR_ELx_EC_HVC64] = "HVC (AArch64)",
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[ESR_ELx_EC_SMC64] = "SMC (AArch64)",
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[ESR_ELx_EC_SYS64] = "MSR/MRS (AArch64)",
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[ESR_ELx_EC_IMP_DEF] = "EL3 IMP DEF",
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[ESR_ELx_EC_IABT_LOW] = "IABT (lower EL)",
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[ESR_ELx_EC_IABT_CUR] = "IABT (current EL)",
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[ESR_ELx_EC_PC_ALIGN] = "PC Alignment",
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[ESR_ELx_EC_DABT_LOW] = "DABT (lower EL)",
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[ESR_ELx_EC_DABT_CUR] = "DABT (current EL)",
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[ESR_ELx_EC_SP_ALIGN] = "SP Alignment",
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[ESR_ELx_EC_FP_EXC32] = "FP (AArch32)",
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[ESR_ELx_EC_FP_EXC64] = "FP (AArch64)",
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[ESR_ELx_EC_SERROR] = "SError",
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[ESR_ELx_EC_BREAKPT_LOW] = "Breakpoint (lower EL)",
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[ESR_ELx_EC_BREAKPT_CUR] = "Breakpoint (current EL)",
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[ESR_ELx_EC_SOFTSTP_LOW] = "Software Step (lower EL)",
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[ESR_ELx_EC_SOFTSTP_CUR] = "Software Step (current EL)",
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[ESR_ELx_EC_WATCHPT_LOW] = "Watchpoint (lower EL)",
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[ESR_ELx_EC_WATCHPT_CUR] = "Watchpoint (current EL)",
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[ESR_ELx_EC_BKPT32] = "BKPT (AArch32)",
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[ESR_ELx_EC_VECTOR32] = "Vector catch (AArch32)",
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[ESR_ELx_EC_BRK64] = "BRK (AArch64)",
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};
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const char *esr_get_class_string(u32 esr)
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{
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return esr_class_str[esr >> ESR_ELx_EC_SHIFT];
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}
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/*
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* bad_mode handles the impossible case in the exception vector.
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*/
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asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr)
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{
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siginfo_t info;
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void __user *pc = (void __user *)instruction_pointer(regs);
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console_verbose();
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pr_crit("Bad mode in %s handler detected, code 0x%08x -- %s\n",
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handler[reason], esr, esr_get_class_string(esr));
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__show_regs(regs);
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info.si_signo = SIGILL;
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info.si_errno = 0;
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info.si_code = ILL_ILLOPC;
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info.si_addr = pc;
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arm64_notify_die("Oops - bad mode", regs, &info, 0);
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}
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void __pte_error(const char *file, int line, unsigned long val)
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{
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pr_crit("%s:%d: bad pte %016lx.\n", file, line, val);
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}
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void __pmd_error(const char *file, int line, unsigned long val)
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{
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pr_crit("%s:%d: bad pmd %016lx.\n", file, line, val);
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}
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void __pud_error(const char *file, int line, unsigned long val)
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{
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pr_crit("%s:%d: bad pud %016lx.\n", file, line, val);
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}
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void __pgd_error(const char *file, int line, unsigned long val)
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{
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pr_crit("%s:%d: bad pgd %016lx.\n", file, line, val);
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}
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void __init trap_init(void)
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{
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return;
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}
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