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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d7ea10d9cb
If RTS interrupt is caused by RTS senzing logic inside i.MX UART module the IRQ type cannot be set. It applies only for interrupts going through GPIO layer. The problem has been noticed by Konstantin Kletschke some time ago. No IRQF_TRIGGER set_type function for IRQ 26 (MPU) I would not change type to fixed 0, because it could be possible to use different GPIO MX1 pin for RTS in the theory. On the other hand it is only for documentation purposes now, because RTS read code would have to be adjusted in such case. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
985 lines
23 KiB
C
985 lines
23 KiB
C
/*
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* linux/drivers/serial/imx.c
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*
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* Driver for Motorola IMX serial ports
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* Author: Sascha Hauer <sascha@saschahauer.de>
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* Copyright (C) 2004 Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* [29-Mar-2005] Mike Lee
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* Added hardware handshake
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*/
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#if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/hardware.h>
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#include <asm/arch/imx-uart.h>
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/* We've been assigned a range on the "Low-density serial ports" major */
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#define SERIAL_IMX_MAJOR 204
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#define MINOR_START 41
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#define NR_PORTS 2
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#define IMX_ISR_PASS_LIMIT 256
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/*
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* This is the size of our serial port register set.
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*/
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#define UART_PORT_SIZE 0x100
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/*
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* This determines how often we check the modem status signals
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* for any change. They generally aren't connected to an IRQ
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* so we have to poll them. We also check immediately before
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* filling the TX fifo incase CTS has been dropped.
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*/
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#define MCTRL_TIMEOUT (250*HZ/1000)
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#define DRIVER_NAME "IMX-uart"
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struct imx_port {
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struct uart_port port;
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struct timer_list timer;
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unsigned int old_status;
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int txirq,rxirq,rtsirq;
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int have_rtscts:1;
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};
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/*
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* Handle any change of modem status signal since we were last called.
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*/
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static void imx_mctrl_check(struct imx_port *sport)
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{
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unsigned int status, changed;
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status = sport->port.ops->get_mctrl(&sport->port);
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changed = status ^ sport->old_status;
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if (changed == 0)
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return;
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sport->old_status = status;
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if (changed & TIOCM_RI)
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sport->port.icount.rng++;
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if (changed & TIOCM_DSR)
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sport->port.icount.dsr++;
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if (changed & TIOCM_CAR)
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uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
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if (changed & TIOCM_CTS)
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uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
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wake_up_interruptible(&sport->port.info->delta_msr_wait);
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}
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/*
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* This is our per-port timeout handler, for checking the
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* modem status signals.
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*/
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static void imx_timeout(unsigned long data)
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{
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struct imx_port *sport = (struct imx_port *)data;
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unsigned long flags;
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if (sport->port.info) {
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spin_lock_irqsave(&sport->port.lock, flags);
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imx_mctrl_check(sport);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
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}
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}
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/*
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* interrupts disabled on entry
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*/
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static void imx_stop_tx(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
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}
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/*
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* interrupts disabled on entry
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*/
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static void imx_stop_rx(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
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}
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/*
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* Set the modem control timer to fire immediately.
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*/
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static void imx_enable_ms(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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mod_timer(&sport->timer, jiffies);
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}
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static inline void imx_transmit_buffer(struct imx_port *sport)
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{
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struct circ_buf *xmit = &sport->port.info->xmit;
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while (!(UTS((u32)sport->port.membase) & UTS_TXFULL)) {
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/* send xmit->buf[xmit->tail]
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* out the port here */
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URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) &
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(UART_XMIT_SIZE - 1);
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sport->port.icount.tx++;
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if (uart_circ_empty(xmit))
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break;
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}
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if (uart_circ_empty(xmit))
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imx_stop_tx(&sport->port);
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}
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/*
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* interrupts disabled on entry
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*/
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static void imx_start_tx(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
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imx_transmit_buffer(sport);
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}
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static irqreturn_t imx_rtsint(int irq, void *dev_id)
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{
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struct imx_port *sport = (struct imx_port *)dev_id;
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unsigned int val = USR1((u32)sport->port.membase)&USR1_RTSS;
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unsigned long flags;
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spin_lock_irqsave(&sport->port.lock, flags);
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USR1((u32)sport->port.membase) = USR1_RTSD;
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uart_handle_cts_change(&sport->port, !!val);
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wake_up_interruptible(&sport->port.info->delta_msr_wait);
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spin_unlock_irqrestore(&sport->port.lock, flags);
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return IRQ_HANDLED;
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}
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static irqreturn_t imx_txint(int irq, void *dev_id)
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{
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struct imx_port *sport = (struct imx_port *)dev_id;
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struct circ_buf *xmit = &sport->port.info->xmit;
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unsigned long flags;
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spin_lock_irqsave(&sport->port.lock,flags);
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if (sport->port.x_char)
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{
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/* Send next char */
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URTX0((u32)sport->port.membase) = sport->port.x_char;
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goto out;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
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imx_stop_tx(&sport->port);
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goto out;
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}
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imx_transmit_buffer(sport);
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&sport->port);
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out:
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spin_unlock_irqrestore(&sport->port.lock,flags);
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return IRQ_HANDLED;
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}
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static irqreturn_t imx_rxint(int irq, void *dev_id)
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{
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struct imx_port *sport = dev_id;
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unsigned int rx,flg,ignored = 0;
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struct tty_struct *tty = sport->port.info->tty;
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unsigned long flags;
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rx = URXD0((u32)sport->port.membase);
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spin_lock_irqsave(&sport->port.lock,flags);
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do {
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flg = TTY_NORMAL;
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sport->port.icount.rx++;
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if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
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USR2((u32)sport->port.membase) |= USR2_BRCD;
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if(uart_handle_break(&sport->port))
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goto ignore_char;
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}
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if (uart_handle_sysrq_char
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(&sport->port, (unsigned char)rx))
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goto ignore_char;
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if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
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goto handle_error;
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error_return:
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tty_insert_flip_char(tty, rx, flg);
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ignore_char:
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rx = URXD0((u32)sport->port.membase);
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} while(rx & URXD_CHARRDY);
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out:
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spin_unlock_irqrestore(&sport->port.lock,flags);
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tty_flip_buffer_push(tty);
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return IRQ_HANDLED;
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handle_error:
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if (rx & URXD_PRERR)
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sport->port.icount.parity++;
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else if (rx & URXD_FRMERR)
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sport->port.icount.frame++;
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if (rx & URXD_OVRRUN)
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sport->port.icount.overrun++;
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if (rx & sport->port.ignore_status_mask) {
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if (++ignored > 100)
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goto out;
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goto ignore_char;
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}
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rx &= sport->port.read_status_mask;
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if (rx & URXD_PRERR)
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flg = TTY_PARITY;
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else if (rx & URXD_FRMERR)
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flg = TTY_FRAME;
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if (rx & URXD_OVRRUN)
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flg = TTY_OVERRUN;
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#ifdef SUPPORT_SYSRQ
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sport->port.sysrq = 0;
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#endif
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goto error_return;
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}
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/*
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* Return TIOCSER_TEMT when transmitter is not busy.
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*/
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static unsigned int imx_tx_empty(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
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}
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/*
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* We have a modem side uart, so the meanings of RTS and CTS are inverted.
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*/
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static unsigned int imx_get_mctrl(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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unsigned int tmp = TIOCM_DSR | TIOCM_CAR;
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if (USR1((u32)sport->port.membase) & USR1_RTSS)
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tmp |= TIOCM_CTS;
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if (UCR2((u32)sport->port.membase) & UCR2_CTS)
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tmp |= TIOCM_RTS;
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return tmp;
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}
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static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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struct imx_port *sport = (struct imx_port *)port;
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if (mctrl & TIOCM_RTS)
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UCR2((u32)sport->port.membase) |= UCR2_CTS;
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else
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UCR2((u32)sport->port.membase) &= ~UCR2_CTS;
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}
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/*
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* Interrupts always disabled.
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*/
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static void imx_break_ctl(struct uart_port *port, int break_state)
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{
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struct imx_port *sport = (struct imx_port *)port;
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unsigned long flags;
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spin_lock_irqsave(&sport->port.lock, flags);
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if ( break_state != 0 )
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UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
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else
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UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
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spin_unlock_irqrestore(&sport->port.lock, flags);
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}
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#define TXTL 2 /* reset default */
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#define RXTL 1 /* reset default */
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static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
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{
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unsigned int val;
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unsigned int ufcr_rfdiv;
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/* set receiver / transmitter trigger level.
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* RFDIV is set such way to satisfy requested uartclk value
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*/
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val = TXTL<<10 | RXTL;
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ufcr_rfdiv = (imx_get_perclk1() + sport->port.uartclk / 2) / sport->port.uartclk;
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if(!ufcr_rfdiv)
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ufcr_rfdiv = 1;
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if(ufcr_rfdiv >= 7)
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ufcr_rfdiv = 6;
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else
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ufcr_rfdiv = 6 - ufcr_rfdiv;
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val |= UFCR_RFDIV & (ufcr_rfdiv << 7);
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UFCR((u32)sport->port.membase) = val;
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return 0;
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}
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static int imx_startup(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
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int retval;
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unsigned long flags;
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imx_setup_ufcr(sport, 0);
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/* disable the DREN bit (Data Ready interrupt enable) before
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* requesting IRQs
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*/
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UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
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/*
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* Allocate the IRQ
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*/
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retval = request_irq(sport->rxirq, imx_rxint, 0,
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DRIVER_NAME, sport);
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if (retval) goto error_out1;
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retval = request_irq(sport->txirq, imx_txint, 0,
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DRIVER_NAME, sport);
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if (retval) goto error_out2;
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retval = request_irq(sport->rtsirq, imx_rtsint,
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(sport->rtsirq < IMX_IRQS) ? 0 :
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IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
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DRIVER_NAME, sport);
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if (retval) goto error_out3;
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/*
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* Finally, clear and enable interrupts
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*/
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USR1((u32)sport->port.membase) = USR1_RTSD;
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UCR1((u32)sport->port.membase) |=
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(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
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|
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UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
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/*
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* Enable modem status interrupts
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*/
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spin_lock_irqsave(&sport->port.lock,flags);
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imx_enable_ms(&sport->port);
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spin_unlock_irqrestore(&sport->port.lock,flags);
|
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|
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return 0;
|
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|
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error_out3:
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free_irq(sport->txirq, sport);
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error_out2:
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free_irq(sport->rxirq, sport);
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error_out1:
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return retval;
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}
|
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|
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static void imx_shutdown(struct uart_port *port)
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{
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struct imx_port *sport = (struct imx_port *)port;
|
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|
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/*
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* Stop our timer.
|
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*/
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del_timer_sync(&sport->timer);
|
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|
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/*
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* Free the interrupts
|
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*/
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free_irq(sport->rtsirq, sport);
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free_irq(sport->txirq, sport);
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free_irq(sport->rxirq, sport);
|
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|
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/*
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* Disable all interrupts, port and break condition.
|
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*/
|
|
|
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UCR1((u32)sport->port.membase) &=
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~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN);
|
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}
|
|
|
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static void
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imx_set_termios(struct uart_port *port, struct ktermios *termios,
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struct ktermios *old)
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{
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struct imx_port *sport = (struct imx_port *)port;
|
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unsigned long flags;
|
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unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
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unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
|
|
|
|
/*
|
|
* If we don't support modem control lines, don't allow
|
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* these to be set.
|
|
*/
|
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if (0) {
|
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termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
|
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termios->c_cflag |= CLOCAL;
|
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}
|
|
|
|
/*
|
|
* We only support CS7 and CS8.
|
|
*/
|
|
while ((termios->c_cflag & CSIZE) != CS7 &&
|
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(termios->c_cflag & CSIZE) != CS8) {
|
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termios->c_cflag &= ~CSIZE;
|
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termios->c_cflag |= old_csize;
|
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old_csize = CS8;
|
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}
|
|
|
|
if ((termios->c_cflag & CSIZE) == CS8)
|
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ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
|
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else
|
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ucr2 = UCR2_SRST | UCR2_IRTS;
|
|
|
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if (termios->c_cflag & CRTSCTS) {
|
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if( sport->have_rtscts ) {
|
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ucr2 &= ~UCR2_IRTS;
|
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ucr2 |= UCR2_CTSC;
|
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} else {
|
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termios->c_cflag &= ~CRTSCTS;
|
|
}
|
|
}
|
|
|
|
if (termios->c_cflag & CSTOPB)
|
|
ucr2 |= UCR2_STPB;
|
|
if (termios->c_cflag & PARENB) {
|
|
ucr2 |= UCR2_PREN;
|
|
if (termios->c_cflag & PARODD)
|
|
ucr2 |= UCR2_PROE;
|
|
}
|
|
|
|
/*
|
|
* Ask the core to calculate the divisor for us.
|
|
*/
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
|
quot = uart_get_divisor(port, baud);
|
|
|
|
spin_lock_irqsave(&sport->port.lock, flags);
|
|
|
|
sport->port.read_status_mask = 0;
|
|
if (termios->c_iflag & INPCK)
|
|
sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
|
|
if (termios->c_iflag & (BRKINT | PARMRK))
|
|
sport->port.read_status_mask |= URXD_BRK;
|
|
|
|
/*
|
|
* Characters to ignore
|
|
*/
|
|
sport->port.ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
sport->port.ignore_status_mask |= URXD_PRERR;
|
|
if (termios->c_iflag & IGNBRK) {
|
|
sport->port.ignore_status_mask |= URXD_BRK;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (termios->c_iflag & IGNPAR)
|
|
sport->port.ignore_status_mask |= URXD_OVRRUN;
|
|
}
|
|
|
|
del_timer_sync(&sport->timer);
|
|
|
|
/*
|
|
* Update the per-port timeout.
|
|
*/
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
/*
|
|
* disable interrupts and drain transmitter
|
|
*/
|
|
old_ucr1 = UCR1((u32)sport->port.membase);
|
|
UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
|
|
|
|
while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
|
|
barrier();
|
|
|
|
/* then, disable everything */
|
|
old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
|
|
UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
|
|
|
|
/* set the parity, stop bits and data size */
|
|
UCR2((u32)sport->port.membase) = ucr2;
|
|
|
|
/* set the baud rate. We assume uartclk = 16 MHz
|
|
*
|
|
* baud * 16 UBIR - 1
|
|
* --------- = --------
|
|
* uartclk UBMR - 1
|
|
*/
|
|
UBIR((u32)sport->port.membase) = (baud / 100) - 1;
|
|
UBMR((u32)sport->port.membase) = 10000 - 1;
|
|
|
|
UCR1((u32)sport->port.membase) = old_ucr1;
|
|
UCR2((u32)sport->port.membase) |= old_txrxen;
|
|
|
|
if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
|
|
imx_enable_ms(&sport->port);
|
|
|
|
spin_unlock_irqrestore(&sport->port.lock, flags);
|
|
}
|
|
|
|
static const char *imx_type(struct uart_port *port)
|
|
{
|
|
struct imx_port *sport = (struct imx_port *)port;
|
|
|
|
return sport->port.type == PORT_IMX ? "IMX" : NULL;
|
|
}
|
|
|
|
/*
|
|
* Release the memory region(s) being used by 'port'.
|
|
*/
|
|
static void imx_release_port(struct uart_port *port)
|
|
{
|
|
struct imx_port *sport = (struct imx_port *)port;
|
|
|
|
release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
|
|
}
|
|
|
|
/*
|
|
* Request the memory region(s) being used by 'port'.
|
|
*/
|
|
static int imx_request_port(struct uart_port *port)
|
|
{
|
|
struct imx_port *sport = (struct imx_port *)port;
|
|
|
|
return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
|
|
"imx-uart") != NULL ? 0 : -EBUSY;
|
|
}
|
|
|
|
/*
|
|
* Configure/autoconfigure the port.
|
|
*/
|
|
static void imx_config_port(struct uart_port *port, int flags)
|
|
{
|
|
struct imx_port *sport = (struct imx_port *)port;
|
|
|
|
if (flags & UART_CONFIG_TYPE &&
|
|
imx_request_port(&sport->port) == 0)
|
|
sport->port.type = PORT_IMX;
|
|
}
|
|
|
|
/*
|
|
* Verify the new serial_struct (for TIOCSSERIAL).
|
|
* The only change we allow are to the flags and type, and
|
|
* even then only between PORT_IMX and PORT_UNKNOWN
|
|
*/
|
|
static int
|
|
imx_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
struct imx_port *sport = (struct imx_port *)port;
|
|
int ret = 0;
|
|
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
|
|
ret = -EINVAL;
|
|
if (sport->port.irq != ser->irq)
|
|
ret = -EINVAL;
|
|
if (ser->io_type != UPIO_MEM)
|
|
ret = -EINVAL;
|
|
if (sport->port.uartclk / 16 != ser->baud_base)
|
|
ret = -EINVAL;
|
|
if ((void *)sport->port.mapbase != ser->iomem_base)
|
|
ret = -EINVAL;
|
|
if (sport->port.iobase != ser->port)
|
|
ret = -EINVAL;
|
|
if (ser->hub6 != 0)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
static struct uart_ops imx_pops = {
|
|
.tx_empty = imx_tx_empty,
|
|
.set_mctrl = imx_set_mctrl,
|
|
.get_mctrl = imx_get_mctrl,
|
|
.stop_tx = imx_stop_tx,
|
|
.start_tx = imx_start_tx,
|
|
.stop_rx = imx_stop_rx,
|
|
.enable_ms = imx_enable_ms,
|
|
.break_ctl = imx_break_ctl,
|
|
.startup = imx_startup,
|
|
.shutdown = imx_shutdown,
|
|
.set_termios = imx_set_termios,
|
|
.type = imx_type,
|
|
.release_port = imx_release_port,
|
|
.request_port = imx_request_port,
|
|
.config_port = imx_config_port,
|
|
.verify_port = imx_verify_port,
|
|
};
|
|
|
|
static struct imx_port imx_ports[] = {
|
|
{
|
|
.txirq = UART1_MINT_TX,
|
|
.rxirq = UART1_MINT_RX,
|
|
.rtsirq = UART1_MINT_RTS,
|
|
.port = {
|
|
.type = PORT_IMX,
|
|
.iotype = UPIO_MEM,
|
|
.membase = (void *)IMX_UART1_BASE,
|
|
.mapbase = IMX_UART1_BASE, /* FIXME */
|
|
.irq = UART1_MINT_RX,
|
|
.uartclk = 16000000,
|
|
.fifosize = 32,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.ops = &imx_pops,
|
|
.line = 0,
|
|
},
|
|
}, {
|
|
.txirq = UART2_MINT_TX,
|
|
.rxirq = UART2_MINT_RX,
|
|
.rtsirq = UART2_MINT_RTS,
|
|
.port = {
|
|
.type = PORT_IMX,
|
|
.iotype = UPIO_MEM,
|
|
.membase = (void *)IMX_UART2_BASE,
|
|
.mapbase = IMX_UART2_BASE, /* FIXME */
|
|
.irq = UART2_MINT_RX,
|
|
.uartclk = 16000000,
|
|
.fifosize = 32,
|
|
.flags = UPF_BOOT_AUTOCONF,
|
|
.ops = &imx_pops,
|
|
.line = 1,
|
|
},
|
|
}
|
|
};
|
|
|
|
/*
|
|
* Setup the IMX serial ports.
|
|
* Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
|
|
* Which serial port this ends up being depends on the machine you're
|
|
* running this kernel on. I'm not convinced that this is a good idea,
|
|
* but that's the way it traditionally works.
|
|
*
|
|
*/
|
|
static void __init imx_init_ports(void)
|
|
{
|
|
static int first = 1;
|
|
int i;
|
|
|
|
if (!first)
|
|
return;
|
|
first = 0;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
|
|
init_timer(&imx_ports[i].timer);
|
|
imx_ports[i].timer.function = imx_timeout;
|
|
imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_IMX_CONSOLE
|
|
static void imx_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
struct imx_port *sport = (struct imx_port *)port;
|
|
while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
|
|
barrier();
|
|
URTX0((u32)sport->port.membase) = ch;
|
|
}
|
|
|
|
/*
|
|
* Interrupts are disabled on entering
|
|
*/
|
|
static void
|
|
imx_console_write(struct console *co, const char *s, unsigned int count)
|
|
{
|
|
struct imx_port *sport = &imx_ports[co->index];
|
|
unsigned int old_ucr1, old_ucr2;
|
|
|
|
/*
|
|
* First, save UCR1/2 and then disable interrupts
|
|
*/
|
|
old_ucr1 = UCR1((u32)sport->port.membase);
|
|
old_ucr2 = UCR2((u32)sport->port.membase);
|
|
|
|
UCR1((u32)sport->port.membase) =
|
|
(old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
|
|
& ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN);
|
|
UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
|
|
|
|
uart_console_write(&sport->port, s, count, imx_console_putchar);
|
|
|
|
/*
|
|
* Finally, wait for transmitter to become empty
|
|
* and restore UCR1/2
|
|
*/
|
|
while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
|
|
|
|
UCR1((u32)sport->port.membase) = old_ucr1;
|
|
UCR2((u32)sport->port.membase) = old_ucr2;
|
|
}
|
|
|
|
/*
|
|
* If the port was already initialised (eg, by a boot loader),
|
|
* try to determine the current setup.
|
|
*/
|
|
static void __init
|
|
imx_console_get_options(struct imx_port *sport, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
|
|
if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
|
|
/* ok, the port was enabled */
|
|
unsigned int ucr2, ubir,ubmr, uartclk;
|
|
unsigned int baud_raw;
|
|
unsigned int ucfr_rfdiv;
|
|
|
|
ucr2 = UCR2((u32)sport->port.membase);
|
|
|
|
*parity = 'n';
|
|
if (ucr2 & UCR2_PREN) {
|
|
if (ucr2 & UCR2_PROE)
|
|
*parity = 'o';
|
|
else
|
|
*parity = 'e';
|
|
}
|
|
|
|
if (ucr2 & UCR2_WS)
|
|
*bits = 8;
|
|
else
|
|
*bits = 7;
|
|
|
|
ubir = UBIR((u32)sport->port.membase) & 0xffff;
|
|
ubmr = UBMR((u32)sport->port.membase) & 0xffff;
|
|
|
|
|
|
ucfr_rfdiv = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) >> 7;
|
|
if (ucfr_rfdiv == 6)
|
|
ucfr_rfdiv = 7;
|
|
else
|
|
ucfr_rfdiv = 6 - ucfr_rfdiv;
|
|
|
|
uartclk = imx_get_perclk1();
|
|
uartclk /= ucfr_rfdiv;
|
|
|
|
{ /*
|
|
* The next code provides exact computation of
|
|
* baud_raw = round(((uartclk/16) * (ubir + 1)) / (ubmr + 1))
|
|
* without need of float support or long long division,
|
|
* which would be required to prevent 32bit arithmetic overflow
|
|
*/
|
|
unsigned int mul = ubir + 1;
|
|
unsigned int div = 16 * (ubmr + 1);
|
|
unsigned int rem = uartclk % div;
|
|
|
|
baud_raw = (uartclk / div) * mul;
|
|
baud_raw += (rem * mul + div / 2) / div;
|
|
*baud = (baud_raw + 50) / 100 * 100;
|
|
}
|
|
|
|
if(*baud != baud_raw)
|
|
printk(KERN_INFO "Serial: Console IMX rounded baud rate from %d to %d\n",
|
|
baud_raw, *baud);
|
|
}
|
|
}
|
|
|
|
static int __init
|
|
imx_console_setup(struct console *co, char *options)
|
|
{
|
|
struct imx_port *sport;
|
|
int baud = 9600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
|
|
co->index = 0;
|
|
sport = &imx_ports[co->index];
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
imx_console_get_options(sport, &baud, &parity, &bits);
|
|
|
|
imx_setup_ufcr(sport, 0);
|
|
|
|
return uart_set_options(&sport->port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver imx_reg;
|
|
static struct console imx_console = {
|
|
.name = "ttySMX",
|
|
.write = imx_console_write,
|
|
.device = uart_console_device,
|
|
.setup = imx_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &imx_reg,
|
|
};
|
|
|
|
static int __init imx_rs_console_init(void)
|
|
{
|
|
imx_init_ports();
|
|
register_console(&imx_console);
|
|
return 0;
|
|
}
|
|
console_initcall(imx_rs_console_init);
|
|
|
|
#define IMX_CONSOLE &imx_console
|
|
#else
|
|
#define IMX_CONSOLE NULL
|
|
#endif
|
|
|
|
static struct uart_driver imx_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = DRIVER_NAME,
|
|
.dev_name = "ttySMX",
|
|
.major = SERIAL_IMX_MAJOR,
|
|
.minor = MINOR_START,
|
|
.nr = ARRAY_SIZE(imx_ports),
|
|
.cons = IMX_CONSOLE,
|
|
};
|
|
|
|
static int serial_imx_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
struct imx_port *sport = platform_get_drvdata(dev);
|
|
|
|
if (sport)
|
|
uart_suspend_port(&imx_reg, &sport->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int serial_imx_resume(struct platform_device *dev)
|
|
{
|
|
struct imx_port *sport = platform_get_drvdata(dev);
|
|
|
|
if (sport)
|
|
uart_resume_port(&imx_reg, &sport->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int serial_imx_probe(struct platform_device *dev)
|
|
{
|
|
struct imxuart_platform_data *pdata;
|
|
|
|
imx_ports[dev->id].port.dev = &dev->dev;
|
|
|
|
pdata = (struct imxuart_platform_data *)dev->dev.platform_data;
|
|
if(pdata && (pdata->flags & IMXUART_HAVE_RTSCTS))
|
|
imx_ports[dev->id].have_rtscts = 1;
|
|
|
|
uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
|
|
platform_set_drvdata(dev, &imx_ports[dev->id]);
|
|
return 0;
|
|
}
|
|
|
|
static int serial_imx_remove(struct platform_device *dev)
|
|
{
|
|
struct imx_port *sport = platform_get_drvdata(dev);
|
|
|
|
platform_set_drvdata(dev, NULL);
|
|
|
|
if (sport)
|
|
uart_remove_one_port(&imx_reg, &sport->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver serial_imx_driver = {
|
|
.probe = serial_imx_probe,
|
|
.remove = serial_imx_remove,
|
|
|
|
.suspend = serial_imx_suspend,
|
|
.resume = serial_imx_resume,
|
|
.driver = {
|
|
.name = "imx-uart",
|
|
},
|
|
};
|
|
|
|
static int __init imx_serial_init(void)
|
|
{
|
|
int ret;
|
|
|
|
printk(KERN_INFO "Serial: IMX driver\n");
|
|
|
|
imx_init_ports();
|
|
|
|
ret = uart_register_driver(&imx_reg);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&serial_imx_driver);
|
|
if (ret != 0)
|
|
uart_unregister_driver(&imx_reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void __exit imx_serial_exit(void)
|
|
{
|
|
uart_unregister_driver(&imx_reg);
|
|
platform_driver_unregister(&serial_imx_driver);
|
|
}
|
|
|
|
module_init(imx_serial_init);
|
|
module_exit(imx_serial_exit);
|
|
|
|
MODULE_AUTHOR("Sascha Hauer");
|
|
MODULE_DESCRIPTION("IMX generic serial port driver");
|
|
MODULE_LICENSE("GPL");
|