linux_dsm_epyc7002/include/linux/platform_data/pxa_sdhci.h
Chris Ball 8f63795c60 mmc: sdhci-pxav3: dt: Support "cd-gpios" property
Tested on OLPC XO-4/MMP3, where the card detection pin for one of
the controllers is a sideband GPIO.  The third cell in the cd-gpios
property controls whether the GPIO is active high/active low.

(Also, pass host_caps2 through from platdata to the mmc host.)

Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
[kliu5@marvell.com: Compile fix]
Signed-off-by: Chris Ball <cjb@laptop.org>
2012-09-19 16:29:12 +08:00

62 lines
1.8 KiB
C

/*
* include/linux/platform_data/pxa_sdhci.h
*
* Copyright 2010 Marvell
* Zhangfei Gao <zhangfei.gao@marvell.com>
*
* PXA Platform - SDHCI platform data definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _PXA_SDHCI_H_
#define _PXA_SDHCI_H_
/* pxa specific flag */
/* Require clock free running */
#define PXA_FLAG_ENABLE_CLOCK_GATING (1<<0)
/* card always wired to host, like on-chip emmc */
#define PXA_FLAG_CARD_PERMANENT (1<<1)
/* Board design supports 8-bit data on SD/SDIO BUS */
#define PXA_FLAG_SD_8_BIT_CAPABLE_SLOT (1<<2)
/*
* struct pxa_sdhci_platdata() - Platform device data for PXA SDHCI
* @flags: flags for platform requirement
* @clk_delay_cycles:
* mmp2: each step is roughly 100ps, 5bits width
* pxa910: each step is 1ns, 4bits width
* @clk_delay_sel: select clk_delay, used on pxa910
* 0: choose feedback clk
* 1: choose feedback clk + delay value
* 2: choose internal clk
* @clk_delay_enable: enable clk_delay or not, used on pxa910
* @ext_cd_gpio: gpio pin used for external CD line
* @ext_cd_gpio_invert: invert values for external CD gpio line
* @max_speed: the maximum speed supported
* @host_caps: Standard MMC host capabilities bit field.
* @quirks: quirks of platfrom
* @pm_caps: pm_caps of platfrom
*/
struct sdhci_pxa_platdata {
unsigned int flags;
unsigned int clk_delay_cycles;
unsigned int clk_delay_sel;
bool clk_delay_enable;
unsigned int ext_cd_gpio;
bool ext_cd_gpio_invert;
unsigned int max_speed;
unsigned int host_caps;
unsigned int host_caps2;
unsigned int quirks;
unsigned int pm_caps;
};
struct sdhci_pxa {
u8 clk_enable;
u8 power_mode;
};
#endif /* _PXA_SDHCI_H_ */