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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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ba869d3c40
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
153 lines
3.4 KiB
C
153 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Hisilicon Fast Ethernet MDIO Bus Driver
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*
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* Copyright (c) 2016 HiSilicon Technologies Co., Ltd.
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*/
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#include <linux/clk.h>
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#include <linux/iopoll.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_mdio.h>
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#include <linux/platform_device.h>
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#define MDIO_RWCTRL 0x00
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#define MDIO_RO_DATA 0x04
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#define MDIO_WRITE BIT(13)
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#define MDIO_RW_FINISH BIT(15)
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#define BIT_PHY_ADDR_OFFSET 8
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#define BIT_WR_DATA_OFFSET 16
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struct hisi_femac_mdio_data {
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struct clk *clk;
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void __iomem *membase;
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};
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static int hisi_femac_mdio_wait_ready(struct hisi_femac_mdio_data *data)
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{
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u32 val;
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return readl_poll_timeout(data->membase + MDIO_RWCTRL,
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val, val & MDIO_RW_FINISH, 20, 10000);
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}
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static int hisi_femac_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
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{
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struct hisi_femac_mdio_data *data = bus->priv;
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int ret;
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ret = hisi_femac_mdio_wait_ready(data);
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if (ret)
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return ret;
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writel((mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
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data->membase + MDIO_RWCTRL);
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ret = hisi_femac_mdio_wait_ready(data);
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if (ret)
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return ret;
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return readl(data->membase + MDIO_RO_DATA) & 0xFFFF;
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}
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static int hisi_femac_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
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u16 value)
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{
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struct hisi_femac_mdio_data *data = bus->priv;
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int ret;
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ret = hisi_femac_mdio_wait_ready(data);
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if (ret)
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return ret;
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writel(MDIO_WRITE | (value << BIT_WR_DATA_OFFSET) |
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(mii_id << BIT_PHY_ADDR_OFFSET) | regnum,
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data->membase + MDIO_RWCTRL);
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return hisi_femac_mdio_wait_ready(data);
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}
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static int hisi_femac_mdio_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct mii_bus *bus;
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struct hisi_femac_mdio_data *data;
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int ret;
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bus = mdiobus_alloc_size(sizeof(*data));
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if (!bus)
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return -ENOMEM;
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bus->name = "hisi_femac_mii_bus";
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bus->read = &hisi_femac_mdio_read;
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bus->write = &hisi_femac_mdio_write;
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snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
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bus->parent = &pdev->dev;
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data = bus->priv;
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data->membase = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(data->membase)) {
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ret = PTR_ERR(data->membase);
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goto err_out_free_mdiobus;
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}
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data->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(data->clk)) {
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ret = PTR_ERR(data->clk);
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goto err_out_free_mdiobus;
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}
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ret = clk_prepare_enable(data->clk);
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if (ret)
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goto err_out_free_mdiobus;
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ret = of_mdiobus_register(bus, np);
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if (ret)
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goto err_out_disable_clk;
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platform_set_drvdata(pdev, bus);
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return 0;
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err_out_disable_clk:
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clk_disable_unprepare(data->clk);
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err_out_free_mdiobus:
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mdiobus_free(bus);
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return ret;
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}
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static int hisi_femac_mdio_remove(struct platform_device *pdev)
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{
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struct mii_bus *bus = platform_get_drvdata(pdev);
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struct hisi_femac_mdio_data *data = bus->priv;
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mdiobus_unregister(bus);
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clk_disable_unprepare(data->clk);
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mdiobus_free(bus);
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return 0;
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}
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static const struct of_device_id hisi_femac_mdio_dt_ids[] = {
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{ .compatible = "hisilicon,hisi-femac-mdio" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, hisi_femac_mdio_dt_ids);
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static struct platform_driver hisi_femac_mdio_driver = {
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.probe = hisi_femac_mdio_probe,
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.remove = hisi_femac_mdio_remove,
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.driver = {
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.name = "hisi-femac-mdio",
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.of_match_table = hisi_femac_mdio_dt_ids,
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},
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};
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module_platform_driver(hisi_femac_mdio_driver);
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MODULE_DESCRIPTION("Hisilicon Fast Ethernet MAC MDIO interface driver");
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MODULE_AUTHOR("Dongpo Li <lidongpo@hisilicon.com>");
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MODULE_LICENSE("GPL");
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