mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2025-02-26 08:33:16 +07:00
![]() Changes from v1->v2:
Add 'select RESET_CONTROLLER' under COMMON_CLK_MEDIATEK and enable
reset.c to be built when COMMON_CLK_MEDIATEK is selected. That should
be quite reasonable because the reset controller is tightly embedded
inside and exported from these clock subsystems. At least it can be found
on infracfg and pericfg subsystem that both are really fundamental block
lots of devices must depend on.
commit
|
||
---|---|---|
.. | ||
clk-apmixed.c | ||
clk-cpumux.c | ||
clk-cpumux.h | ||
clk-gate.c | ||
clk-gate.h | ||
clk-mt2701-bdp.c | ||
clk-mt2701-eth.c | ||
clk-mt2701-hif.c | ||
clk-mt2701-img.c | ||
clk-mt2701-mm.c | ||
clk-mt2701-vdec.c | ||
clk-mt2701.c | ||
clk-mt2712-bdp.c | ||
clk-mt2712-img.c | ||
clk-mt2712-jpgdec.c | ||
clk-mt2712-mfg.c | ||
clk-mt2712-mm.c | ||
clk-mt2712-vdec.c | ||
clk-mt2712-venc.c | ||
clk-mt2712.c | ||
clk-mt6797-img.c | ||
clk-mt6797-mm.c | ||
clk-mt6797-vdec.c | ||
clk-mt6797-venc.c | ||
clk-mt6797.c | ||
clk-mt7622-aud.c | ||
clk-mt7622-eth.c | ||
clk-mt7622-hif.c | ||
clk-mt7622.c | ||
clk-mt8135.c | ||
clk-mt8173.c | ||
clk-mtk.c | ||
clk-mtk.h | ||
clk-pll.c | ||
Kconfig | ||
Makefile | ||
reset.c |