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If the CPU is supporting SMT then the primary thread can be found by checking the lower APIC ID bits for zero. smp_num_siblings is used to build the mask for the APIC ID bits which need to be taken into account. This uses the MPTABLE or ACPI/MADT supplied APIC ID, which can be different than the initial APIC ID in CPUID. But according to AMD the lower bits have to be consistent. Intel gave a tentative confirmation as well. Preparatory patch to support disabling SMT at boot/runtime. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Acked-by: Ingo Molnar <mingo@kernel.org> |
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.. | ||
apic_common.c | ||
apic_flat_64.c | ||
apic_noop.c | ||
apic_numachip.c | ||
apic.c | ||
bigsmp_32.c | ||
hw_nmi.c | ||
io_apic.c | ||
ipi.c | ||
Makefile | ||
msi.c | ||
probe_32.c | ||
probe_64.c | ||
vector.c | ||
x2apic_cluster.c | ||
x2apic_phys.c | ||
x2apic_uv_x.c | ||
x2apic.h |