Kyung Min Park 18ec63faef x86/cpufeatures: Enumerate TSX suspend load address tracking instructions ... Intel TSX suspend load tracking instructions aim to give a way to choose which memory accesses do not need to be tracked in the TSX read set. Add TSX suspend load tracking CPUID feature flag TSXLDTRK for enumeration. A processor supports Intel TSX suspend load address tracking if CPUID.0x07.0x0:EDX[16] is present. Two instructions XSUSLDTRK, XRESLDTRK are available when this feature is present. The CPU feature flag is shown as "tsxldtrk" in /proc/cpuinfo. Signed-off-by: Kyung Min Park <kyung.min.park@intel.com> Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/1598316478-23337-2-git-send-email-cathy.zhang@intel.com		2020-08-30 17:43:40 +02:00
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asm	x86/cpufeatures: Enumerate TSX suspend load address tracking instructions	2020-08-30 17:43:40 +02:00
uapi/asm	Support for FSGSBASE. Almost 5 years after the first RFC to support it,	2020-08-04 21:16:22 -07:00