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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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8126334b20
None of these files are actually using any __init type directives and hence don't need to include <linux/init.h>. Most are just a left over from __devinit and __cpuinit removal, or simply due to code getting copied from one driver to the next. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Cc: linux-watchdog@vger.kernel.org
499 lines
12 KiB
C
499 lines
12 KiB
C
/*
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* i6300esb: Watchdog timer driver for Intel 6300ESB chipset
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*
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* (c) Copyright 2004 Google Inc.
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* (c) Copyright 2005 David Härdeman <david@2gen.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* based on i810-tco.c which is in turn based on softdog.c
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*
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* The timer is implemented in the following I/O controller hubs:
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* (See the intel documentation on http://developer.intel.com.)
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* 6300ESB chip : document number 300641-004
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*
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* 2004YYZZ Ross Biro
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* Initial version 0.01
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* 2004YYZZ Ross Biro
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* Version 0.02
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* 20050210 David Härdeman <david@2gen.com>
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* Ported driver to kernel 2.6
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*/
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/*
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* Includes, defines, variables, module parameters, ...
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/uaccess.h>
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#include <linux/io.h>
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/* Module and version information */
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#define ESB_VERSION "0.05"
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#define ESB_MODULE_NAME "i6300ESB timer"
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#define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION
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/* PCI configuration registers */
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#define ESB_CONFIG_REG 0x60 /* Config register */
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#define ESB_LOCK_REG 0x68 /* WDT lock register */
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/* Memory mapped registers */
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#define ESB_TIMER1_REG (BASEADDR + 0x00)/* Timer1 value after each reset */
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#define ESB_TIMER2_REG (BASEADDR + 0x04)/* Timer2 value after each reset */
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#define ESB_GINTSR_REG (BASEADDR + 0x08)/* General Interrupt Status Register */
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#define ESB_RELOAD_REG (BASEADDR + 0x0c)/* Reload register */
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/* Lock register bits */
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#define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
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#define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
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#define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
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/* Config register bits */
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#define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
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#define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
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#define ESB_WDT_INTTYPE (0x03 << 0) /* Interrupt type on timer1 timeout */
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/* Reload register bits */
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#define ESB_WDT_TIMEOUT (0x01 << 9) /* Watchdog timed out */
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#define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
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/* Magic constants */
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#define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
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#define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
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/* internal variables */
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static void __iomem *BASEADDR;
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static DEFINE_SPINLOCK(esb_lock); /* Guards the hardware */
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static unsigned long timer_alive;
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static struct pci_dev *esb_pci;
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static unsigned short triggered; /* The status of the watchdog upon boot */
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static char esb_expect_close;
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/* We can only use 1 card due to the /dev/watchdog restriction */
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static int cards_found;
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/* module parameters */
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/* 30 sec default heartbeat (1 < heartbeat < 2*1023) */
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#define WATCHDOG_HEARTBEAT 30
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static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat,
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"Watchdog heartbeat in seconds. (1<heartbeat<2046, default="
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__MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
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static bool nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout,
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"Watchdog cannot be stopped once started (default="
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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/*
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* Some i6300ESB specific functions
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*/
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/*
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* Prepare for reloading the timer by unlocking the proper registers.
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* This is performed by first writing 0x80 followed by 0x86 to the
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* reload register. After this the appropriate registers can be written
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* to once before they need to be unlocked again.
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*/
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static inline void esb_unlock_registers(void)
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{
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writew(ESB_UNLOCK1, ESB_RELOAD_REG);
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writew(ESB_UNLOCK2, ESB_RELOAD_REG);
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}
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static int esb_timer_start(void)
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{
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u8 val;
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spin_lock(&esb_lock);
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esb_unlock_registers();
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
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/* Enable or Enable + Lock? */
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val = ESB_WDT_ENABLE | (nowayout ? ESB_WDT_LOCK : 0x00);
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pci_write_config_byte(esb_pci, ESB_LOCK_REG, val);
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spin_unlock(&esb_lock);
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return 0;
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}
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static int esb_timer_stop(void)
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{
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u8 val;
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spin_lock(&esb_lock);
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/* First, reset timers as suggested by the docs */
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esb_unlock_registers();
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
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/* Then disable the WDT */
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pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0);
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pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val);
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spin_unlock(&esb_lock);
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/* Returns 0 if the timer was disabled, non-zero otherwise */
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return val & ESB_WDT_ENABLE;
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}
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static void esb_timer_keepalive(void)
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{
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spin_lock(&esb_lock);
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esb_unlock_registers();
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
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/* FIXME: Do we need to flush anything here? */
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spin_unlock(&esb_lock);
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}
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static int esb_timer_set_heartbeat(int time)
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{
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u32 val;
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if (time < 0x1 || time > (2 * 0x03ff))
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return -EINVAL;
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spin_lock(&esb_lock);
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/* We shift by 9, so if we are passed a value of 1 sec,
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* val will be 1 << 9 = 512, then write that to two
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* timers => 2 * 512 = 1024 (which is decremented at 1KHz)
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*/
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val = time << 9;
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/* Write timer 1 */
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esb_unlock_registers();
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writel(val, ESB_TIMER1_REG);
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/* Write timer 2 */
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esb_unlock_registers();
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writel(val, ESB_TIMER2_REG);
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/* Reload */
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esb_unlock_registers();
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writew(ESB_WDT_RELOAD, ESB_RELOAD_REG);
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/* FIXME: Do we need to flush everything out? */
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/* Done */
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heartbeat = time;
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spin_unlock(&esb_lock);
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return 0;
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}
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/*
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* /dev/watchdog handling
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*/
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static int esb_open(struct inode *inode, struct file *file)
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{
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/* /dev/watchdog can only be opened once */
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if (test_and_set_bit(0, &timer_alive))
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return -EBUSY;
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/* Reload and activate timer */
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esb_timer_start();
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return nonseekable_open(inode, file);
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}
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static int esb_release(struct inode *inode, struct file *file)
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{
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/* Shut off the timer. */
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if (esb_expect_close == 42)
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esb_timer_stop();
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else {
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pr_crit("Unexpected close, not stopping watchdog!\n");
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esb_timer_keepalive();
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}
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clear_bit(0, &timer_alive);
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esb_expect_close = 0;
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return 0;
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}
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static ssize_t esb_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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/* See if we got the magic character 'V' and reload the timer */
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if (len) {
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if (!nowayout) {
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size_t i;
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/* note: just in case someone wrote the magic character
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* five months ago... */
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esb_expect_close = 0;
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/* scan to see whether or not we got the
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* magic character */
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V')
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esb_expect_close = 42;
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}
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}
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/* someone wrote to us, we should reload the timer */
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esb_timer_keepalive();
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}
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return len;
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}
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static long esb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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int new_options, retval = -EINVAL;
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int new_heartbeat;
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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static const struct watchdog_info ident = {
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.options = WDIOF_SETTIMEOUT |
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WDIOF_KEEPALIVEPING |
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WDIOF_MAGICCLOSE,
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.firmware_version = 0,
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.identity = ESB_MODULE_NAME,
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};
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &ident,
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sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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return put_user(0, p);
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case WDIOC_GETBOOTSTATUS:
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return put_user(triggered, p);
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case WDIOC_SETOPTIONS:
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{
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if (get_user(new_options, p))
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return -EFAULT;
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if (new_options & WDIOS_DISABLECARD) {
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esb_timer_stop();
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retval = 0;
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}
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if (new_options & WDIOS_ENABLECARD) {
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esb_timer_start();
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retval = 0;
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}
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return retval;
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}
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case WDIOC_KEEPALIVE:
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esb_timer_keepalive();
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return 0;
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case WDIOC_SETTIMEOUT:
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{
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if (get_user(new_heartbeat, p))
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return -EFAULT;
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if (esb_timer_set_heartbeat(new_heartbeat))
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return -EINVAL;
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esb_timer_keepalive();
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/* Fall */
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}
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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default:
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return -ENOTTY;
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}
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}
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/*
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* Kernel Interfaces
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*/
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static const struct file_operations esb_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = esb_write,
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.unlocked_ioctl = esb_ioctl,
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.open = esb_open,
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.release = esb_release,
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};
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static struct miscdevice esb_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &esb_fops,
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};
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/*
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* Data for PCI driver interface
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*/
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static const struct pci_device_id esb_pci_tbl[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), },
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{ 0, }, /* End of list */
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};
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MODULE_DEVICE_TABLE(pci, esb_pci_tbl);
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/*
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* Init & exit routines
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*/
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static unsigned char esb_getdevice(struct pci_dev *pdev)
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{
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if (pci_enable_device(pdev)) {
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pr_err("failed to enable device\n");
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goto err_devput;
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}
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if (pci_request_region(pdev, 0, ESB_MODULE_NAME)) {
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pr_err("failed to request region\n");
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goto err_disable;
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}
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BASEADDR = pci_ioremap_bar(pdev, 0);
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if (BASEADDR == NULL) {
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/* Something's wrong here, BASEADDR has to be set */
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pr_err("failed to get BASEADDR\n");
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goto err_release;
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}
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/* Done */
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esb_pci = pdev;
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return 1;
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err_release:
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pci_release_region(pdev, 0);
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err_disable:
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pci_disable_device(pdev);
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err_devput:
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return 0;
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}
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static void esb_initdevice(void)
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{
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u8 val1;
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u16 val2;
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/*
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* Config register:
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* Bit 5 : 0 = Enable WDT_OUTPUT
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* Bit 2 : 0 = set the timer frequency to the PCI clock
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* divided by 2^15 (approx 1KHz).
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* Bits 1:0 : 11 = WDT_INT_TYPE Disabled.
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* The watchdog has two timers, it can be setup so that the
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* expiry of timer1 results in an interrupt and the expiry of
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* timer2 results in a reboot. We set it to not generate
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* any interrupts as there is not much we can do with it
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* right now.
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*/
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pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003);
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/* Check that the WDT isn't already locked */
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pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1);
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if (val1 & ESB_WDT_LOCK)
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pr_warn("nowayout already set\n");
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/* Set the timer to watchdog mode and disable it for now */
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pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00);
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/* Check if the watchdog was previously triggered */
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esb_unlock_registers();
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val2 = readw(ESB_RELOAD_REG);
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if (val2 & ESB_WDT_TIMEOUT)
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triggered = WDIOF_CARDRESET;
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/* Reset WDT_TIMEOUT flag and timers */
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esb_unlock_registers();
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writew((ESB_WDT_TIMEOUT | ESB_WDT_RELOAD), ESB_RELOAD_REG);
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/* And set the correct timeout value */
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esb_timer_set_heartbeat(heartbeat);
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}
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static int esb_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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int ret;
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cards_found++;
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if (cards_found == 1)
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pr_info("Intel 6300ESB WatchDog Timer Driver v%s\n",
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ESB_VERSION);
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if (cards_found > 1) {
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pr_err("This driver only supports 1 device\n");
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return -ENODEV;
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}
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/* Check whether or not the hardware watchdog is there */
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if (!esb_getdevice(pdev) || esb_pci == NULL)
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return -ENODEV;
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/* Check that the heartbeat value is within it's range;
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if not reset to the default */
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if (heartbeat < 0x1 || heartbeat > 2 * 0x03ff) {
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heartbeat = WATCHDOG_HEARTBEAT;
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pr_info("heartbeat value must be 1<heartbeat<2046, using %d\n",
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heartbeat);
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}
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/* Initialize the watchdog and make sure it does not run */
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esb_initdevice();
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/* Register the watchdog so that userspace has access to it */
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ret = misc_register(&esb_miscdev);
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if (ret != 0) {
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pr_err("cannot register miscdev on minor=%d (err=%d)\n",
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WATCHDOG_MINOR, ret);
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goto err_unmap;
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}
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pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
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BASEADDR, heartbeat, nowayout);
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return 0;
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err_unmap:
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iounmap(BASEADDR);
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pci_release_region(esb_pci, 0);
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pci_disable_device(esb_pci);
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esb_pci = NULL;
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return ret;
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}
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static void esb_remove(struct pci_dev *pdev)
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{
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/* Stop the timer before we leave */
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if (!nowayout)
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esb_timer_stop();
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/* Deregister */
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misc_deregister(&esb_miscdev);
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iounmap(BASEADDR);
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pci_release_region(esb_pci, 0);
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pci_disable_device(esb_pci);
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esb_pci = NULL;
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}
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static void esb_shutdown(struct pci_dev *pdev)
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{
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esb_timer_stop();
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}
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static struct pci_driver esb_driver = {
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.name = ESB_MODULE_NAME,
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.id_table = esb_pci_tbl,
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.probe = esb_probe,
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.remove = esb_remove,
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.shutdown = esb_shutdown,
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};
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module_pci_driver(esb_driver);
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MODULE_AUTHOR("Ross Biro and David Härdeman");
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MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets");
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MODULE_LICENSE("GPL");
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