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94b07c1f8c
Stateful CPU architecture extensions may require the signal frame to grow to a size that exceeds the arch's MINSIGSTKSZ #define. However, changing this #define is an ABI break. To allow userspace the option of determining the signal frame size in a more forwards-compatible way, this patch adds a new auxv entry tagged with AT_MINSIGSTKSZ, which provides the maximum signal frame size that the process can observe during its lifetime. If AT_MINSIGSTKSZ is absent from the aux vector, the caller can assume that the MINSIGSTKSZ #define is sufficient. This allows for a consistent interface with older kernels that do not provide AT_MINSIGSTKSZ. The idea is that libc could expose this via sysconf() or some similar mechanism. There is deliberately no AT_SIGSTKSZ. The kernel knows nothing about userspace's own stack overheads and should not pretend to know. For arm64: The primary motivation for this interface is the Scalable Vector Extension, which can require at least 4KB or so of extra space in the signal frame for the largest hardware implementations. To determine the correct value, a "Christmas tree" mode (via the add_all argument) is added to setup_sigframe_layout(), to simulate addition of all possible records to the signal frame at maximum possible size. If this procedure goes wrong somehow, resulting in a stupidly large frame layout and hence failure of sigframe_alloc() to allocate a record to the frame, then this is indicative of a kernel bug. In this case, we WARN() and no attempt is made to populate AT_MINSIGSTKSZ for userspace. For arm64 SVE: The SVE context block in the signal frame needs to be considered too when computing the maximum possible signal frame size. Because the size of this block depends on the vector length, this patch computes the size based not on the thread's current vector length but instead on the maximum possible vector length: this determines the maximum size of SVE context block that can be observed in any signal frame for the lifetime of the process. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
223 lines
6.1 KiB
C
223 lines
6.1 KiB
C
/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_ELF_H
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#define __ASM_ELF_H
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#include <asm/hwcap.h>
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/*
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* ELF register definitions..
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*/
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#include <asm/ptrace.h>
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#include <asm/user.h>
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/*
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* AArch64 static relocation types.
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*/
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/* Miscellaneous. */
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#define R_ARM_NONE 0
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#define R_AARCH64_NONE 256
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/* Data. */
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#define R_AARCH64_ABS64 257
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#define R_AARCH64_ABS32 258
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#define R_AARCH64_ABS16 259
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#define R_AARCH64_PREL64 260
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#define R_AARCH64_PREL32 261
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#define R_AARCH64_PREL16 262
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/* Instructions. */
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#define R_AARCH64_MOVW_UABS_G0 263
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#define R_AARCH64_MOVW_UABS_G0_NC 264
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#define R_AARCH64_MOVW_UABS_G1 265
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#define R_AARCH64_MOVW_UABS_G1_NC 266
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#define R_AARCH64_MOVW_UABS_G2 267
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#define R_AARCH64_MOVW_UABS_G2_NC 268
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#define R_AARCH64_MOVW_UABS_G3 269
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#define R_AARCH64_MOVW_SABS_G0 270
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#define R_AARCH64_MOVW_SABS_G1 271
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#define R_AARCH64_MOVW_SABS_G2 272
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#define R_AARCH64_LD_PREL_LO19 273
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#define R_AARCH64_ADR_PREL_LO21 274
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#define R_AARCH64_ADR_PREL_PG_HI21 275
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#define R_AARCH64_ADR_PREL_PG_HI21_NC 276
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#define R_AARCH64_ADD_ABS_LO12_NC 277
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#define R_AARCH64_LDST8_ABS_LO12_NC 278
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#define R_AARCH64_TSTBR14 279
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#define R_AARCH64_CONDBR19 280
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#define R_AARCH64_JUMP26 282
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#define R_AARCH64_CALL26 283
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#define R_AARCH64_LDST16_ABS_LO12_NC 284
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#define R_AARCH64_LDST32_ABS_LO12_NC 285
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#define R_AARCH64_LDST64_ABS_LO12_NC 286
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#define R_AARCH64_LDST128_ABS_LO12_NC 299
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#define R_AARCH64_MOVW_PREL_G0 287
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#define R_AARCH64_MOVW_PREL_G0_NC 288
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#define R_AARCH64_MOVW_PREL_G1 289
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#define R_AARCH64_MOVW_PREL_G1_NC 290
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#define R_AARCH64_MOVW_PREL_G2 291
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#define R_AARCH64_MOVW_PREL_G2_NC 292
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#define R_AARCH64_MOVW_PREL_G3 293
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#define R_AARCH64_RELATIVE 1027
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/*
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* These are used to set parameters in the core dumps.
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*/
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#define ELF_CLASS ELFCLASS64
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#ifdef __AARCH64EB__
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#define ELF_DATA ELFDATA2MSB
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#else
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#define ELF_DATA ELFDATA2LSB
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#endif
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#define ELF_ARCH EM_AARCH64
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/*
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* This yields a string that ld.so will use to load implementation
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* specific libraries for optimization. This is more specific in
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* intent than poking at uname or /proc/cpuinfo.
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*/
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#define ELF_PLATFORM_SIZE 16
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#ifdef __AARCH64EB__
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#define ELF_PLATFORM ("aarch64_be")
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#else
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#define ELF_PLATFORM ("aarch64")
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#endif
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ((x)->e_machine == EM_AARCH64)
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#define elf_read_implies_exec(ex,stk) (stk != EXSTACK_DISABLE_X)
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#define CORE_DUMP_USE_REGSET
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/*
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* This is the base location for PIE (ET_DYN with INTERP) loads. On
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* 64-bit, this is above 4GB to leave the entire 32-bit address
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* space open for things that want to use the area for 32-bit pointers.
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*/
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#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
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#ifndef __ASSEMBLY__
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#include <linux/bug.h>
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#include <asm/processor.h> /* for signal_minsigstksz, used by ARCH_DLINFO */
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typedef unsigned long elf_greg_t;
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#define ELF_NGREG (sizeof(struct user_pt_regs) / sizeof(elf_greg_t))
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#define ELF_CORE_COPY_REGS(dest, regs) \
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*(struct user_pt_regs *)&(dest) = (regs)->user_regs;
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typedef elf_greg_t elf_gregset_t[ELF_NGREG];
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typedef struct user_fpsimd_state elf_fpregset_t;
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/*
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* When the program starts, a1 contains a pointer to a function to be
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* registered with atexit, as per the SVR4 ABI. A value of 0 means we have no
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* such handler.
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*/
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#define ELF_PLAT_INIT(_r, load_addr) (_r)->regs[0] = 0
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#define SET_PERSONALITY(ex) \
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({ \
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clear_thread_flag(TIF_32BIT); \
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current->personality &= ~READ_IMPLIES_EXEC; \
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})
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/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
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#define ARCH_DLINFO \
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do { \
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NEW_AUX_ENT(AT_SYSINFO_EHDR, \
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(elf_addr_t)current->mm->context.vdso); \
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\
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/* \
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* Should always be nonzero unless there's a kernel bug. \
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* If we haven't determined a sensible value to give to \
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* userspace, omit the entry: \
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*/ \
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if (likely(signal_minsigstksz)) \
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NEW_AUX_ENT(AT_MINSIGSTKSZ, signal_minsigstksz); \
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else \
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NEW_AUX_ENT(AT_IGNORE, 0); \
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} while (0)
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#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
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struct linux_binprm;
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extern int arch_setup_additional_pages(struct linux_binprm *bprm,
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int uses_interp);
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/* 1GB of VA */
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#ifdef CONFIG_COMPAT
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#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \
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0x7ff >> (PAGE_SHIFT - 12) : \
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0x3ffff >> (PAGE_SHIFT - 12))
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#else
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#define STACK_RND_MASK (0x3ffff >> (PAGE_SHIFT - 12))
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#endif
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#ifdef __AARCH64EB__
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#define COMPAT_ELF_PLATFORM ("v8b")
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#else
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#define COMPAT_ELF_PLATFORM ("v8l")
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#endif
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#ifdef CONFIG_COMPAT
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/* PIE load location for compat arm. Must match ARM ELF_ET_DYN_BASE. */
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#define COMPAT_ELF_ET_DYN_BASE 0x000400000UL
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/* AArch32 registers. */
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#define COMPAT_ELF_NGREG 18
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typedef unsigned int compat_elf_greg_t;
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typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG];
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/* AArch32 EABI. */
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#define EF_ARM_EABI_MASK 0xff000000
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#define compat_elf_check_arch(x) (system_supports_32bit_el0() && \
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((x)->e_machine == EM_ARM) && \
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((x)->e_flags & EF_ARM_EABI_MASK))
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#define compat_start_thread compat_start_thread
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/*
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* Unlike the native SET_PERSONALITY macro, the compat version maintains
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* READ_IMPLIES_EXEC across an execve() since this is the behaviour on
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* arch/arm/.
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*/
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#define COMPAT_SET_PERSONALITY(ex) \
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({ \
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set_thread_flag(TIF_32BIT); \
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})
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#define COMPAT_ARCH_DLINFO
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extern int aarch32_setup_vectors_page(struct linux_binprm *bprm,
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int uses_interp);
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#define compat_arch_setup_additional_pages \
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aarch32_setup_vectors_page
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#endif /* CONFIG_COMPAT */
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#endif /* !__ASSEMBLY__ */
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#endif
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