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d800edebe3
Latest Samsung SoCs have one or more PL330 as their DMACs. This patch
implements the S3C DMA API for PL330 core driver.
The design has been kept as generic as possible while keeping effort to
add support for new SoCs to the minimum possible level.
Some of the salient features of this driver are:-
o Automatic scheduling of client requests onto DMAC if more than
one DMAC can reach the peripheral. Factors, such as current load
and number of exclusive but inactive peripherals that are
supported by the DMAC, are used to decide suitability of a DMAC
for a particular client.
o CIRCULAR buffer option is supported.
o The driver scales transparently with the number of DMACs and total
peripherals in the platform, since all peripherals are added to
the peripheral pool and DMACs to the controller pool.
For most conservative use of memory, smallest driver size and best
performance, we don't employ legacy data structures of the S3C DMA API.
That should not have any affect since those data structures are completely
invisible to the DMA clients.
Signed-off-by: Jassi Brar <jassi.brar@samsung.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
79 lines
1.6 KiB
C
79 lines
1.6 KiB
C
/*
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* Copyright (C) 2010 Samsung Electronics Co. Ltd.
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* Jaswinder Singh <jassi.brar@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __S3C_DMA_PL330_H_
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#define __S3C_DMA_PL330_H_
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#define S3C2410_DMAF_AUTOSTART (1 << 0)
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#define S3C2410_DMAF_CIRCULAR (1 << 1)
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/*
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* PL330 can assign any channel to communicate with
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* any of the peripherals attched to the DMAC.
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* For the sake of consistency across client drivers,
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* We keep the channel names unchanged and only add
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* missing peripherals are added.
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* Order is not important since S3C PL330 API driver
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* use these just as IDs.
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*/
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enum dma_ch {
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DMACH_UART0_RX,
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DMACH_UART0_TX,
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DMACH_UART1_RX,
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DMACH_UART1_TX,
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DMACH_UART2_RX,
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DMACH_UART2_TX,
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DMACH_UART3_RX,
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DMACH_UART3_TX,
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DMACH_IRDA,
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DMACH_I2S0_RX,
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DMACH_I2S0_TX,
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DMACH_I2S0S_TX,
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DMACH_I2S1_RX,
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DMACH_I2S1_TX,
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DMACH_I2S2_RX,
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DMACH_I2S2_TX,
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DMACH_SPI0_RX,
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DMACH_SPI0_TX,
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DMACH_SPI1_RX,
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DMACH_SPI1_TX,
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DMACH_SPI2_RX,
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DMACH_SPI2_TX,
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DMACH_AC97_MICIN,
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DMACH_AC97_PCMIN,
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DMACH_AC97_PCMOUT,
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DMACH_EXTERNAL,
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DMACH_PWM,
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DMACH_SPDIF,
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DMACH_HSI_RX,
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DMACH_HSI_TX,
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DMACH_PCM0_TX,
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DMACH_PCM0_RX,
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DMACH_PCM1_TX,
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DMACH_PCM1_RX,
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DMACH_PCM2_TX,
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DMACH_PCM2_RX,
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DMACH_MSM_REQ3,
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DMACH_MSM_REQ2,
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DMACH_MSM_REQ1,
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DMACH_MSM_REQ0,
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/* END Marker, also used to denote a reserved channel */
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DMACH_MAX,
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};
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static inline bool s3c_dma_has_circular(void)
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{
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return true;
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}
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#include <plat/dma.h>
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#endif /* __S3C_DMA_PL330_H_ */
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