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177ae09b5d
Introduce a flag to signal that access to a BO will be synchronized through an external mechanism. Currently all buffers shared between contexts are subject to implicit synchronization. However, this is only required for protocols that currently don't support an explicit synchronization mechanism (DRI2/3). This patch introduces the AMDGPU_GEM_CREATE_EXPLICIT_SYNC, so that users can specify when it is safe to disable implicit sync. v2: only disable explicit sync in amdgpu_cs_ioctl Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Andres Rodriguez <andresx7@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
59 lines
2.1 KiB
C
59 lines
2.1 KiB
C
/*
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* Copyright 2016 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Christian König
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*/
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#ifndef __AMDGPU_SYNC_H__
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#define __AMDGPU_SYNC_H__
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#include <linux/hashtable.h>
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struct dma_fence;
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struct reservation_object;
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struct amdgpu_device;
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struct amdgpu_ring;
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/*
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* Container for fences used to sync command submissions.
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*/
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struct amdgpu_sync {
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DECLARE_HASHTABLE(fences, 4);
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struct dma_fence *last_vm_update;
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};
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void amdgpu_sync_create(struct amdgpu_sync *sync);
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int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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struct dma_fence *f);
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int amdgpu_sync_resv(struct amdgpu_device *adev,
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struct amdgpu_sync *sync,
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struct reservation_object *resv,
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void *owner,
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bool explicit_sync);
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struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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struct amdgpu_ring *ring);
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struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
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void amdgpu_sync_free(struct amdgpu_sync *sync);
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int amdgpu_sync_init(void);
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void amdgpu_sync_fini(void);
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#endif
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