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c874b6ba55
courtesy of Jingoo Han. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSC6mSAAoJEBLB8Bhh3lVKhKYQALt3lklah1BpZIqyTiLqtizN YVF/lSubpcHB2BfnZUzaSInE+17uo21DJ44tQ56O0lWDsxLqadJzTDiJ2BG5Ol3u JOIWti/Yl8YoCQQcir6QksBAUkR26iCpelO8kO6J/JWGEekVgl3Oik4NOmYrdN55 rUoHIyVdK5Z5y4j79Pmth7//+c6OFli1cAeUmBlIvxS9T4T2ZCz30jBim76VTS8H AjgaX/aBlE3SxAYoMWLZh1VglukxAVCG2qZ9lm7iNLCpkGwP59jT/DE9Gok2IXBg id9SMTkrpitijCyM3oKYox14Tl+QP/brElnWCVyVeRIpkVH8s2WUkU+qHeZztBg9 8i/aU9x4bOCkDjhvBjIM4jbYJAvvaVKlIXPvANO8xl/A0D7nCsmCs7DpritRHZEr 3y4N8SQsaamVD083+UaVciAo1XCpl5cNq9gH/Y7+U8h2bIThZn8HTbZ1uWgXaCY1 OwfElbJDKInsSmDVBEklMI8CF42YsjGQc2JC+A/3M3CapTfepKPg6SvptNQueZb+ SUw0mgGBumpdDQSHo5tPf5JL1y57ERkdOBVryrqYtr6qdjw3ox9o/+B8eTy3gkg1 b71LEhzG2UbdSVaHiYhRE/IR3W3yKzNX8Oh3BTHfp04jqnNijx4hHu9oX7j3W59M P/bd6GHHI5ZY66aLqCue =r2kL -----END PGP SIGNATURE----- Merge tag 'edac_for_3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp into x86/ras Pull RAS/EDAC updates from Boris Petkov: "An amd64_edac fix for single channel configurations + trivial cleanups courtesy of Jingoo Han." Signed-off-by: Ingo Molnar <mingo@kernel.org>
1171 lines
29 KiB
C
1171 lines
29 KiB
C
/*
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* edac_mc kernel module
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* (C) 2005-2007 Linux Networx (http://lnxi.com)
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*
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* This file may be distributed under the terms of the
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* GNU General Public License.
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*
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* Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
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*
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* (c) 2012-2013 - Mauro Carvalho Chehab <mchehab@redhat.com>
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* The entire API were re-written, and ported to use struct device
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*
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*/
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#include <linux/ctype.h>
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#include <linux/slab.h>
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#include <linux/edac.h>
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#include <linux/bug.h>
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#include <linux/pm_runtime.h>
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#include <linux/uaccess.h>
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#include "edac_core.h"
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#include "edac_module.h"
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/* MC EDAC Controls, setable by module parameter, and sysfs */
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static int edac_mc_log_ue = 1;
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static int edac_mc_log_ce = 1;
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static int edac_mc_panic_on_ue;
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static int edac_mc_poll_msec = 1000;
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/* Getter functions for above */
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int edac_mc_get_log_ue(void)
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{
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return edac_mc_log_ue;
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}
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int edac_mc_get_log_ce(void)
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{
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return edac_mc_log_ce;
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}
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int edac_mc_get_panic_on_ue(void)
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{
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return edac_mc_panic_on_ue;
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}
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/* this is temporary */
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int edac_mc_get_poll_msec(void)
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{
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return edac_mc_poll_msec;
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}
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static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
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{
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long l;
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int ret;
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if (!val)
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return -EINVAL;
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ret = kstrtol(val, 0, &l);
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if (ret)
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return ret;
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if ((int)l != l)
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return -EINVAL;
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*((int *)kp->arg) = l;
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/* notify edac_mc engine to reset the poll period */
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edac_mc_reset_delay_period(l);
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return 0;
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}
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/* Parameter declarations for above */
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module_param(edac_mc_panic_on_ue, int, 0644);
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MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
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module_param(edac_mc_log_ue, int, 0644);
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MODULE_PARM_DESC(edac_mc_log_ue,
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"Log uncorrectable error to console: 0=off 1=on");
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module_param(edac_mc_log_ce, int, 0644);
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MODULE_PARM_DESC(edac_mc_log_ce,
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"Log correctable error to console: 0=off 1=on");
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module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
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&edac_mc_poll_msec, 0644);
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MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
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static struct device *mci_pdev;
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/*
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* various constants for Memory Controllers
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*/
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static const char * const mem_types[] = {
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[MEM_EMPTY] = "Empty",
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[MEM_RESERVED] = "Reserved",
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[MEM_UNKNOWN] = "Unknown",
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[MEM_FPM] = "FPM",
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[MEM_EDO] = "EDO",
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[MEM_BEDO] = "BEDO",
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[MEM_SDR] = "Unbuffered-SDR",
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[MEM_RDR] = "Registered-SDR",
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[MEM_DDR] = "Unbuffered-DDR",
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[MEM_RDDR] = "Registered-DDR",
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[MEM_RMBS] = "RMBS",
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[MEM_DDR2] = "Unbuffered-DDR2",
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[MEM_FB_DDR2] = "FullyBuffered-DDR2",
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[MEM_RDDR2] = "Registered-DDR2",
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[MEM_XDR] = "XDR",
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[MEM_DDR3] = "Unbuffered-DDR3",
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[MEM_RDDR3] = "Registered-DDR3"
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};
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static const char * const dev_types[] = {
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[DEV_UNKNOWN] = "Unknown",
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[DEV_X1] = "x1",
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[DEV_X2] = "x2",
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[DEV_X4] = "x4",
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[DEV_X8] = "x8",
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[DEV_X16] = "x16",
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[DEV_X32] = "x32",
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[DEV_X64] = "x64"
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};
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static const char * const edac_caps[] = {
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[EDAC_UNKNOWN] = "Unknown",
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[EDAC_NONE] = "None",
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[EDAC_RESERVED] = "Reserved",
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[EDAC_PARITY] = "PARITY",
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[EDAC_EC] = "EC",
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[EDAC_SECDED] = "SECDED",
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[EDAC_S2ECD2ED] = "S2ECD2ED",
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[EDAC_S4ECD4ED] = "S4ECD4ED",
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[EDAC_S8ECD8ED] = "S8ECD8ED",
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[EDAC_S16ECD16ED] = "S16ECD16ED"
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};
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#ifdef CONFIG_EDAC_LEGACY_SYSFS
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/*
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* EDAC sysfs CSROW data structures and methods
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*/
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#define to_csrow(k) container_of(k, struct csrow_info, dev)
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/*
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* We need it to avoid namespace conflicts between the legacy API
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* and the per-dimm/per-rank one
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*/
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#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
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static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
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struct dev_ch_attribute {
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struct device_attribute attr;
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int channel;
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};
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#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
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struct dev_ch_attribute dev_attr_legacy_##_name = \
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{ __ATTR(_name, _mode, _show, _store), (_var) }
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#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
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/* Set of more default csrow<id> attribute show/store functions */
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static ssize_t csrow_ue_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sprintf(data, "%u\n", csrow->ue_count);
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}
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static ssize_t csrow_ce_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sprintf(data, "%u\n", csrow->ce_count);
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}
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static ssize_t csrow_size_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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int i;
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u32 nr_pages = 0;
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for (i = 0; i < csrow->nr_channels; i++)
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nr_pages += csrow->channels[i]->dimm->nr_pages;
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return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
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}
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static ssize_t csrow_mem_type_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
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}
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static ssize_t csrow_dev_type_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
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}
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static ssize_t csrow_edac_mode_show(struct device *dev,
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struct device_attribute *mattr,
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char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
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}
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/* show/store functions for DIMM Label attributes */
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static ssize_t channel_dimm_label_show(struct device *dev,
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struct device_attribute *mattr,
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char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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/* if field has not been initialized, there is nothing to send */
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if (!rank->dimm->label[0])
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return 0;
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return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
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rank->dimm->label);
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}
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static ssize_t channel_dimm_label_store(struct device *dev,
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struct device_attribute *mattr,
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const char *data, size_t count)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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ssize_t max_size = 0;
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max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
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strncpy(rank->dimm->label, data, max_size);
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rank->dimm->label[max_size] = '\0';
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return max_size;
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}
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/* show function for dynamic chX_ce_count attribute */
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static ssize_t channel_ce_count_show(struct device *dev,
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struct device_attribute *mattr, char *data)
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{
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struct csrow_info *csrow = to_csrow(dev);
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unsigned chan = to_channel(mattr);
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struct rank_info *rank = csrow->channels[chan];
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return sprintf(data, "%u\n", rank->ce_count);
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}
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/* cwrow<id>/attribute files */
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DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
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DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
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DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
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DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
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DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
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DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
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/* default attributes of the CSROW<id> object */
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static struct attribute *csrow_attrs[] = {
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&dev_attr_legacy_dev_type.attr,
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&dev_attr_legacy_mem_type.attr,
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&dev_attr_legacy_edac_mode.attr,
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&dev_attr_legacy_size_mb.attr,
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&dev_attr_legacy_ue_count.attr,
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&dev_attr_legacy_ce_count.attr,
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NULL,
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};
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static struct attribute_group csrow_attr_grp = {
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.attrs = csrow_attrs,
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};
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static const struct attribute_group *csrow_attr_groups[] = {
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&csrow_attr_grp,
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NULL
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};
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static void csrow_attr_release(struct device *dev)
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{
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struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
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edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
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kfree(csrow);
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}
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static struct device_type csrow_attr_type = {
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.groups = csrow_attr_groups,
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.release = csrow_attr_release,
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};
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/*
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* possible dynamic channel DIMM Label attribute files
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*
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*/
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#define EDAC_NR_CHANNELS 6
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DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 0);
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DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 1);
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DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 2);
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DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 3);
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DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 4);
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DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
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channel_dimm_label_show, channel_dimm_label_store, 5);
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/* Total possible dynamic DIMM Label attribute file table */
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static struct device_attribute *dynamic_csrow_dimm_attr[] = {
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&dev_attr_legacy_ch0_dimm_label.attr,
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&dev_attr_legacy_ch1_dimm_label.attr,
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&dev_attr_legacy_ch2_dimm_label.attr,
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&dev_attr_legacy_ch3_dimm_label.attr,
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&dev_attr_legacy_ch4_dimm_label.attr,
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&dev_attr_legacy_ch5_dimm_label.attr
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};
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/* possible dynamic channel ce_count attribute files */
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DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 0);
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DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 1);
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DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 2);
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DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 3);
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DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 4);
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DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
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channel_ce_count_show, NULL, 5);
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/* Total possible dynamic ce_count attribute file table */
|
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static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
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&dev_attr_legacy_ch0_ce_count.attr,
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&dev_attr_legacy_ch1_ce_count.attr,
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&dev_attr_legacy_ch2_ce_count.attr,
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&dev_attr_legacy_ch3_ce_count.attr,
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&dev_attr_legacy_ch4_ce_count.attr,
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&dev_attr_legacy_ch5_ce_count.attr
|
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};
|
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|
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static inline int nr_pages_per_csrow(struct csrow_info *csrow)
|
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{
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int chan, nr_pages = 0;
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|
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for (chan = 0; chan < csrow->nr_channels; chan++)
|
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nr_pages += csrow->channels[chan]->dimm->nr_pages;
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|
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return nr_pages;
|
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}
|
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|
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/* Create a CSROW object under specifed edac_mc_device */
|
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static int edac_create_csrow_object(struct mem_ctl_info *mci,
|
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struct csrow_info *csrow, int index)
|
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{
|
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int err, chan;
|
|
|
|
if (csrow->nr_channels >= EDAC_NR_CHANNELS)
|
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return -ENODEV;
|
|
|
|
csrow->dev.type = &csrow_attr_type;
|
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csrow->dev.bus = mci->bus;
|
|
device_initialize(&csrow->dev);
|
|
csrow->dev.parent = &mci->dev;
|
|
csrow->mci = mci;
|
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dev_set_name(&csrow->dev, "csrow%d", index);
|
|
dev_set_drvdata(&csrow->dev, csrow);
|
|
|
|
edac_dbg(0, "creating (virtual) csrow node %s\n",
|
|
dev_name(&csrow->dev));
|
|
|
|
err = device_add(&csrow->dev);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
for (chan = 0; chan < csrow->nr_channels; chan++) {
|
|
/* Only expose populated DIMMs */
|
|
if (!csrow->channels[chan]->dimm->nr_pages)
|
|
continue;
|
|
err = device_create_file(&csrow->dev,
|
|
dynamic_csrow_dimm_attr[chan]);
|
|
if (err < 0)
|
|
goto error;
|
|
err = device_create_file(&csrow->dev,
|
|
dynamic_csrow_ce_count_attr[chan]);
|
|
if (err < 0) {
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_dimm_attr[chan]);
|
|
goto error;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
|
|
error:
|
|
for (--chan; chan >= 0; chan--) {
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_dimm_attr[chan]);
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_ce_count_attr[chan]);
|
|
}
|
|
put_device(&csrow->dev);
|
|
|
|
return err;
|
|
}
|
|
|
|
/* Create a CSROW object under specifed edac_mc_device */
|
|
static int edac_create_csrow_objects(struct mem_ctl_info *mci)
|
|
{
|
|
int err, i, chan;
|
|
struct csrow_info *csrow;
|
|
|
|
for (i = 0; i < mci->nr_csrows; i++) {
|
|
csrow = mci->csrows[i];
|
|
if (!nr_pages_per_csrow(csrow))
|
|
continue;
|
|
err = edac_create_csrow_object(mci, mci->csrows[i], i);
|
|
if (err < 0) {
|
|
edac_dbg(1,
|
|
"failure: create csrow objects for csrow %d\n",
|
|
i);
|
|
goto error;
|
|
}
|
|
}
|
|
return 0;
|
|
|
|
error:
|
|
for (--i; i >= 0; i--) {
|
|
csrow = mci->csrows[i];
|
|
if (!nr_pages_per_csrow(csrow))
|
|
continue;
|
|
for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
|
|
if (!csrow->channels[chan]->dimm->nr_pages)
|
|
continue;
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_dimm_attr[chan]);
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_ce_count_attr[chan]);
|
|
}
|
|
put_device(&mci->csrows[i]->dev);
|
|
}
|
|
|
|
return err;
|
|
}
|
|
|
|
static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
|
|
{
|
|
int i, chan;
|
|
struct csrow_info *csrow;
|
|
|
|
for (i = mci->nr_csrows - 1; i >= 0; i--) {
|
|
csrow = mci->csrows[i];
|
|
if (!nr_pages_per_csrow(csrow))
|
|
continue;
|
|
for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
|
|
if (!csrow->channels[chan]->dimm->nr_pages)
|
|
continue;
|
|
edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n",
|
|
i, chan);
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_dimm_attr[chan]);
|
|
device_remove_file(&csrow->dev,
|
|
dynamic_csrow_ce_count_attr[chan]);
|
|
}
|
|
device_unregister(&mci->csrows[i]->dev);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Per-dimm (or per-rank) devices
|
|
*/
|
|
|
|
#define to_dimm(k) container_of(k, struct dimm_info, dev)
|
|
|
|
/* show/store functions for DIMM Label attributes */
|
|
static ssize_t dimmdev_location_show(struct device *dev,
|
|
struct device_attribute *mattr, char *data)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
return edac_dimm_info_location(dimm, data, PAGE_SIZE);
|
|
}
|
|
|
|
static ssize_t dimmdev_label_show(struct device *dev,
|
|
struct device_attribute *mattr, char *data)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
/* if field has not been initialized, there is nothing to send */
|
|
if (!dimm->label[0])
|
|
return 0;
|
|
|
|
return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
|
|
}
|
|
|
|
static ssize_t dimmdev_label_store(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
const char *data,
|
|
size_t count)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
ssize_t max_size = 0;
|
|
|
|
max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
|
|
strncpy(dimm->label, data, max_size);
|
|
dimm->label[max_size] = '\0';
|
|
|
|
return max_size;
|
|
}
|
|
|
|
static ssize_t dimmdev_size_show(struct device *dev,
|
|
struct device_attribute *mattr, char *data)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
|
|
}
|
|
|
|
static ssize_t dimmdev_mem_type_show(struct device *dev,
|
|
struct device_attribute *mattr, char *data)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
return sprintf(data, "%s\n", mem_types[dimm->mtype]);
|
|
}
|
|
|
|
static ssize_t dimmdev_dev_type_show(struct device *dev,
|
|
struct device_attribute *mattr, char *data)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
return sprintf(data, "%s\n", dev_types[dimm->dtype]);
|
|
}
|
|
|
|
static ssize_t dimmdev_edac_mode_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct dimm_info *dimm = to_dimm(dev);
|
|
|
|
return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
|
|
}
|
|
|
|
/* dimm/rank attribute files */
|
|
static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
|
|
dimmdev_label_show, dimmdev_label_store);
|
|
static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
|
|
static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
|
|
static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
|
|
static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
|
|
static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
|
|
|
|
/* attributes of the dimm<id>/rank<id> object */
|
|
static struct attribute *dimm_attrs[] = {
|
|
&dev_attr_dimm_label.attr,
|
|
&dev_attr_dimm_location.attr,
|
|
&dev_attr_size.attr,
|
|
&dev_attr_dimm_mem_type.attr,
|
|
&dev_attr_dimm_dev_type.attr,
|
|
&dev_attr_dimm_edac_mode.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group dimm_attr_grp = {
|
|
.attrs = dimm_attrs,
|
|
};
|
|
|
|
static const struct attribute_group *dimm_attr_groups[] = {
|
|
&dimm_attr_grp,
|
|
NULL
|
|
};
|
|
|
|
static void dimm_attr_release(struct device *dev)
|
|
{
|
|
struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
|
|
|
|
edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
|
|
kfree(dimm);
|
|
}
|
|
|
|
static struct device_type dimm_attr_type = {
|
|
.groups = dimm_attr_groups,
|
|
.release = dimm_attr_release,
|
|
};
|
|
|
|
/* Create a DIMM object under specifed memory controller device */
|
|
static int edac_create_dimm_object(struct mem_ctl_info *mci,
|
|
struct dimm_info *dimm,
|
|
int index)
|
|
{
|
|
int err;
|
|
dimm->mci = mci;
|
|
|
|
dimm->dev.type = &dimm_attr_type;
|
|
dimm->dev.bus = mci->bus;
|
|
device_initialize(&dimm->dev);
|
|
|
|
dimm->dev.parent = &mci->dev;
|
|
if (mci->csbased)
|
|
dev_set_name(&dimm->dev, "rank%d", index);
|
|
else
|
|
dev_set_name(&dimm->dev, "dimm%d", index);
|
|
dev_set_drvdata(&dimm->dev, dimm);
|
|
pm_runtime_forbid(&mci->dev);
|
|
|
|
err = device_add(&dimm->dev);
|
|
|
|
edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
|
|
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* Memory controller device
|
|
*/
|
|
|
|
#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
|
|
|
|
static ssize_t mci_reset_counters_store(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
const char *data, size_t count)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
int cnt, row, chan, i;
|
|
mci->ue_mc = 0;
|
|
mci->ce_mc = 0;
|
|
mci->ue_noinfo_count = 0;
|
|
mci->ce_noinfo_count = 0;
|
|
|
|
for (row = 0; row < mci->nr_csrows; row++) {
|
|
struct csrow_info *ri = mci->csrows[row];
|
|
|
|
ri->ue_count = 0;
|
|
ri->ce_count = 0;
|
|
|
|
for (chan = 0; chan < ri->nr_channels; chan++)
|
|
ri->channels[chan]->ce_count = 0;
|
|
}
|
|
|
|
cnt = 1;
|
|
for (i = 0; i < mci->n_layers; i++) {
|
|
cnt *= mci->layers[i].size;
|
|
memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
|
|
memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
|
|
}
|
|
|
|
mci->start_time = jiffies;
|
|
return count;
|
|
}
|
|
|
|
/* Memory scrubbing interface:
|
|
*
|
|
* A MC driver can limit the scrubbing bandwidth based on the CPU type.
|
|
* Therefore, ->set_sdram_scrub_rate should be made to return the actual
|
|
* bandwidth that is accepted or 0 when scrubbing is to be disabled.
|
|
*
|
|
* Negative value still means that an error has occurred while setting
|
|
* the scrub rate.
|
|
*/
|
|
static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
const char *data, size_t count)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
unsigned long bandwidth = 0;
|
|
int new_bw = 0;
|
|
|
|
if (kstrtoul(data, 10, &bandwidth) < 0)
|
|
return -EINVAL;
|
|
|
|
new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
|
|
if (new_bw < 0) {
|
|
edac_printk(KERN_WARNING, EDAC_MC,
|
|
"Error setting scrub rate to: %lu\n", bandwidth);
|
|
return -EINVAL;
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|
|
/*
|
|
* ->get_sdram_scrub_rate() return value semantics same as above.
|
|
*/
|
|
static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
int bandwidth = 0;
|
|
|
|
bandwidth = mci->get_sdram_scrub_rate(mci);
|
|
if (bandwidth < 0) {
|
|
edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
|
|
return bandwidth;
|
|
}
|
|
|
|
return sprintf(data, "%d\n", bandwidth);
|
|
}
|
|
|
|
/* default attribute files for the MCI object */
|
|
static ssize_t mci_ue_count_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
|
|
return sprintf(data, "%d\n", mci->ue_mc);
|
|
}
|
|
|
|
static ssize_t mci_ce_count_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
|
|
return sprintf(data, "%d\n", mci->ce_mc);
|
|
}
|
|
|
|
static ssize_t mci_ce_noinfo_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
|
|
return sprintf(data, "%d\n", mci->ce_noinfo_count);
|
|
}
|
|
|
|
static ssize_t mci_ue_noinfo_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
|
|
return sprintf(data, "%d\n", mci->ue_noinfo_count);
|
|
}
|
|
|
|
static ssize_t mci_seconds_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
|
|
return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
|
|
}
|
|
|
|
static ssize_t mci_ctl_name_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
|
|
return sprintf(data, "%s\n", mci->ctl_name);
|
|
}
|
|
|
|
static ssize_t mci_size_mb_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
int total_pages = 0, csrow_idx, j;
|
|
|
|
for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
|
|
struct csrow_info *csrow = mci->csrows[csrow_idx];
|
|
|
|
for (j = 0; j < csrow->nr_channels; j++) {
|
|
struct dimm_info *dimm = csrow->channels[j]->dimm;
|
|
|
|
total_pages += dimm->nr_pages;
|
|
}
|
|
}
|
|
|
|
return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
|
|
}
|
|
|
|
static ssize_t mci_max_location_show(struct device *dev,
|
|
struct device_attribute *mattr,
|
|
char *data)
|
|
{
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
int i;
|
|
char *p = data;
|
|
|
|
for (i = 0; i < mci->n_layers; i++) {
|
|
p += sprintf(p, "%s %d ",
|
|
edac_layer_name[mci->layers[i].type],
|
|
mci->layers[i].size - 1);
|
|
}
|
|
|
|
return p - data;
|
|
}
|
|
|
|
#ifdef CONFIG_EDAC_DEBUG
|
|
static ssize_t edac_fake_inject_write(struct file *file,
|
|
const char __user *data,
|
|
size_t count, loff_t *ppos)
|
|
{
|
|
struct device *dev = file->private_data;
|
|
struct mem_ctl_info *mci = to_mci(dev);
|
|
static enum hw_event_mc_err_type type;
|
|
u16 errcount = mci->fake_inject_count;
|
|
|
|
if (!errcount)
|
|
errcount = 1;
|
|
|
|
type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
|
|
: HW_EVENT_ERR_CORRECTED;
|
|
|
|
printk(KERN_DEBUG
|
|
"Generating %d %s fake error%s to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
|
|
errcount,
|
|
(type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
|
|
errcount > 1 ? "s" : "",
|
|
mci->fake_inject_layer[0],
|
|
mci->fake_inject_layer[1],
|
|
mci->fake_inject_layer[2]
|
|
);
|
|
edac_mc_handle_error(type, mci, errcount, 0, 0, 0,
|
|
mci->fake_inject_layer[0],
|
|
mci->fake_inject_layer[1],
|
|
mci->fake_inject_layer[2],
|
|
"FAKE ERROR", "for EDAC testing only");
|
|
|
|
return count;
|
|
}
|
|
|
|
static const struct file_operations debug_fake_inject_fops = {
|
|
.open = simple_open,
|
|
.write = edac_fake_inject_write,
|
|
.llseek = generic_file_llseek,
|
|
};
|
|
#endif
|
|
|
|
/* default Control file */
|
|
DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
|
|
|
|
/* default Attribute files */
|
|
DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
|
|
DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
|
|
DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
|
|
DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
|
|
DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
|
|
DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
|
|
DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
|
|
DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
|
|
|
|
/* memory scrubber attribute file */
|
|
DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL);
|
|
|
|
static struct attribute *mci_attrs[] = {
|
|
&dev_attr_reset_counters.attr,
|
|
&dev_attr_mc_name.attr,
|
|
&dev_attr_size_mb.attr,
|
|
&dev_attr_seconds_since_reset.attr,
|
|
&dev_attr_ue_noinfo_count.attr,
|
|
&dev_attr_ce_noinfo_count.attr,
|
|
&dev_attr_ue_count.attr,
|
|
&dev_attr_ce_count.attr,
|
|
&dev_attr_max_location.attr,
|
|
NULL
|
|
};
|
|
|
|
static struct attribute_group mci_attr_grp = {
|
|
.attrs = mci_attrs,
|
|
};
|
|
|
|
static const struct attribute_group *mci_attr_groups[] = {
|
|
&mci_attr_grp,
|
|
NULL
|
|
};
|
|
|
|
static void mci_attr_release(struct device *dev)
|
|
{
|
|
struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
|
|
|
|
edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
|
|
kfree(mci);
|
|
}
|
|
|
|
static struct device_type mci_attr_type = {
|
|
.groups = mci_attr_groups,
|
|
.release = mci_attr_release,
|
|
};
|
|
|
|
#ifdef CONFIG_EDAC_DEBUG
|
|
static struct dentry *edac_debugfs;
|
|
|
|
int __init edac_debugfs_init(void)
|
|
{
|
|
edac_debugfs = debugfs_create_dir("edac", NULL);
|
|
if (IS_ERR(edac_debugfs)) {
|
|
edac_debugfs = NULL;
|
|
return -ENOMEM;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void __exit edac_debugfs_exit(void)
|
|
{
|
|
debugfs_remove(edac_debugfs);
|
|
}
|
|
|
|
int edac_create_debug_nodes(struct mem_ctl_info *mci)
|
|
{
|
|
struct dentry *d, *parent;
|
|
char name[80];
|
|
int i;
|
|
|
|
if (!edac_debugfs)
|
|
return -ENODEV;
|
|
|
|
d = debugfs_create_dir(mci->dev.kobj.name, edac_debugfs);
|
|
if (!d)
|
|
return -ENOMEM;
|
|
parent = d;
|
|
|
|
for (i = 0; i < mci->n_layers; i++) {
|
|
sprintf(name, "fake_inject_%s",
|
|
edac_layer_name[mci->layers[i].type]);
|
|
d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
|
|
&mci->fake_inject_layer[i]);
|
|
if (!d)
|
|
goto nomem;
|
|
}
|
|
|
|
d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
|
|
&mci->fake_inject_ue);
|
|
if (!d)
|
|
goto nomem;
|
|
|
|
d = debugfs_create_u16("fake_inject_count", S_IRUGO | S_IWUSR, parent,
|
|
&mci->fake_inject_count);
|
|
if (!d)
|
|
goto nomem;
|
|
|
|
d = debugfs_create_file("fake_inject", S_IWUSR, parent,
|
|
&mci->dev,
|
|
&debug_fake_inject_fops);
|
|
if (!d)
|
|
goto nomem;
|
|
|
|
mci->debugfs = parent;
|
|
return 0;
|
|
nomem:
|
|
debugfs_remove(mci->debugfs);
|
|
return -ENOMEM;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Create a new Memory Controller kobject instance,
|
|
* mc<id> under the 'mc' directory
|
|
*
|
|
* Return:
|
|
* 0 Success
|
|
* !0 Failure
|
|
*/
|
|
int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
|
|
{
|
|
int i, err;
|
|
|
|
/*
|
|
* The memory controller needs its own bus, in order to avoid
|
|
* namespace conflicts at /sys/bus/edac.
|
|
*/
|
|
mci->bus->name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
|
|
if (!mci->bus->name)
|
|
return -ENOMEM;
|
|
|
|
edac_dbg(0, "creating bus %s\n", mci->bus->name);
|
|
|
|
err = bus_register(mci->bus);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
/* get the /sys/devices/system/edac subsys reference */
|
|
mci->dev.type = &mci_attr_type;
|
|
device_initialize(&mci->dev);
|
|
|
|
mci->dev.parent = mci_pdev;
|
|
mci->dev.bus = mci->bus;
|
|
dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
|
|
dev_set_drvdata(&mci->dev, mci);
|
|
pm_runtime_forbid(&mci->dev);
|
|
|
|
edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
|
|
err = device_add(&mci->dev);
|
|
if (err < 0) {
|
|
edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
|
|
bus_unregister(mci->bus);
|
|
kfree(mci->bus->name);
|
|
return err;
|
|
}
|
|
|
|
if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) {
|
|
if (mci->get_sdram_scrub_rate) {
|
|
dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO;
|
|
dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show;
|
|
}
|
|
if (mci->set_sdram_scrub_rate) {
|
|
dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR;
|
|
dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store;
|
|
}
|
|
err = device_create_file(&mci->dev,
|
|
&dev_attr_sdram_scrub_rate);
|
|
if (err) {
|
|
edac_dbg(1, "failure: create sdram_scrub_rate\n");
|
|
goto fail2;
|
|
}
|
|
}
|
|
/*
|
|
* Create the dimm/rank devices
|
|
*/
|
|
for (i = 0; i < mci->tot_dimms; i++) {
|
|
struct dimm_info *dimm = mci->dimms[i];
|
|
/* Only expose populated DIMMs */
|
|
if (dimm->nr_pages == 0)
|
|
continue;
|
|
#ifdef CONFIG_EDAC_DEBUG
|
|
edac_dbg(1, "creating dimm%d, located at ", i);
|
|
if (edac_debug_level >= 1) {
|
|
int lay;
|
|
for (lay = 0; lay < mci->n_layers; lay++)
|
|
printk(KERN_CONT "%s %d ",
|
|
edac_layer_name[mci->layers[lay].type],
|
|
dimm->location[lay]);
|
|
printk(KERN_CONT "\n");
|
|
}
|
|
#endif
|
|
err = edac_create_dimm_object(mci, dimm, i);
|
|
if (err) {
|
|
edac_dbg(1, "failure: create dimm %d obj\n", i);
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_EDAC_LEGACY_SYSFS
|
|
err = edac_create_csrow_objects(mci);
|
|
if (err < 0)
|
|
goto fail;
|
|
#endif
|
|
|
|
#ifdef CONFIG_EDAC_DEBUG
|
|
edac_create_debug_nodes(mci);
|
|
#endif
|
|
return 0;
|
|
|
|
fail:
|
|
for (i--; i >= 0; i--) {
|
|
struct dimm_info *dimm = mci->dimms[i];
|
|
if (dimm->nr_pages == 0)
|
|
continue;
|
|
device_unregister(&dimm->dev);
|
|
}
|
|
fail2:
|
|
device_unregister(&mci->dev);
|
|
bus_unregister(mci->bus);
|
|
kfree(mci->bus->name);
|
|
return err;
|
|
}
|
|
|
|
/*
|
|
* remove a Memory Controller instance
|
|
*/
|
|
void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
|
|
{
|
|
int i;
|
|
|
|
edac_dbg(0, "\n");
|
|
|
|
#ifdef CONFIG_EDAC_DEBUG
|
|
debugfs_remove(mci->debugfs);
|
|
#endif
|
|
#ifdef CONFIG_EDAC_LEGACY_SYSFS
|
|
edac_delete_csrow_objects(mci);
|
|
#endif
|
|
|
|
for (i = 0; i < mci->tot_dimms; i++) {
|
|
struct dimm_info *dimm = mci->dimms[i];
|
|
if (dimm->nr_pages == 0)
|
|
continue;
|
|
edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
|
|
device_unregister(&dimm->dev);
|
|
}
|
|
}
|
|
|
|
void edac_unregister_sysfs(struct mem_ctl_info *mci)
|
|
{
|
|
edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
|
|
device_unregister(&mci->dev);
|
|
bus_unregister(mci->bus);
|
|
kfree(mci->bus->name);
|
|
}
|
|
|
|
static void mc_attr_release(struct device *dev)
|
|
{
|
|
/*
|
|
* There's no container structure here, as this is just the mci
|
|
* parent device, used to create the /sys/devices/mc sysfs node.
|
|
* So, there are no attributes on it.
|
|
*/
|
|
edac_dbg(1, "Releasing device %s\n", dev_name(dev));
|
|
kfree(dev);
|
|
}
|
|
|
|
static struct device_type mc_attr_type = {
|
|
.release = mc_attr_release,
|
|
};
|
|
/*
|
|
* Init/exit code for the module. Basically, creates/removes /sys/class/rc
|
|
*/
|
|
int __init edac_mc_sysfs_init(void)
|
|
{
|
|
struct bus_type *edac_subsys;
|
|
int err;
|
|
|
|
/* get the /sys/devices/system/edac subsys reference */
|
|
edac_subsys = edac_get_sysfs_subsys();
|
|
if (edac_subsys == NULL) {
|
|
edac_dbg(1, "no edac_subsys\n");
|
|
err = -EINVAL;
|
|
goto out;
|
|
}
|
|
|
|
mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
|
|
if (!mci_pdev) {
|
|
err = -ENOMEM;
|
|
goto out_put_sysfs;
|
|
}
|
|
|
|
mci_pdev->bus = edac_subsys;
|
|
mci_pdev->type = &mc_attr_type;
|
|
device_initialize(mci_pdev);
|
|
dev_set_name(mci_pdev, "mc");
|
|
|
|
err = device_add(mci_pdev);
|
|
if (err < 0)
|
|
goto out_dev_free;
|
|
|
|
edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
|
|
|
|
return 0;
|
|
|
|
out_dev_free:
|
|
kfree(mci_pdev);
|
|
out_put_sysfs:
|
|
edac_put_sysfs_subsys();
|
|
out:
|
|
return err;
|
|
}
|
|
|
|
void __exit edac_mc_sysfs_exit(void)
|
|
{
|
|
device_unregister(mci_pdev);
|
|
edac_put_sysfs_subsys();
|
|
}
|