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ca6bc691b1
Later Allwinner SoCs split out the reset controls for individual modules out of the clock gate controls. The "Security System" crypto engine is no different. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
24 lines
782 B
Plaintext
24 lines
782 B
Plaintext
* Allwinner Security System found on A20 SoC
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Required properties:
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- compatible : Should be "allwinner,sun4i-a10-crypto".
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- reg: Should contain the Security System register location and length.
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- interrupts: Should contain the IRQ line for the Security System.
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- clocks : List of clock specifiers, corresponding to ahb and ss.
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- clock-names : Name of the functional clock, should be
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* "ahb" : AHB gating clock
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* "mod" : SS controller clock
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Optional properties:
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- resets : phandle + reset specifier pair
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- reset-names : must contain "ahb"
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Example:
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crypto: crypto-engine@01c15000 {
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compatible = "allwinner,sun4i-a10-crypto";
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reg = <0x01c15000 0x1000>;
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ahb_gates 5>, <&ss_clk>;
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clock-names = "ahb", "mod";
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};
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