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6faf5916e6
The writing is on the wall for the existence of a single execution queue along each engine, and as a consequence we will not be able to track dependencies along the HW queue itself, i.e. we will not be able to use HW semaphores on gen7 as they use a global set of registers (and unlike gen8+ we can not effectively target memory to keep per-context seqno and dependencies). On the positive side, when we implement request reordering for gen7 we also can not presume a simple execution queue and would also require removing the current semaphore generation code. So this bring us another step closer to request reordering for ringbuffer submission! The negative side is that using interrupts to drive inter-engine synchronisation is much slower (4us -> 15us to do a nop on each of the 3 engines on ivb). This is much better than it was at the time of introducing the HW semaphores and equally important userspace weaned itself off intermixing dependent BLT/RENDER operations (the prime culprit was glyph rendering in UXA). So while we regress the microbenchmarks, it should not impact the user. References: https://bugs.freedesktop.org/show_bug.cgi?id=108888 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181228140736.32606-2-chris@chris-wilson.co.uk
140 lines
4.2 KiB
C
140 lines
4.2 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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*/
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#ifndef I915_TIMELINE_H
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#define I915_TIMELINE_H
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#include <linux/list.h>
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#include <linux/kref.h>
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#include "i915_request.h"
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#include "i915_syncmap.h"
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#include "i915_utils.h"
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struct i915_timeline {
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u64 fence_context;
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u32 seqno;
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spinlock_t lock;
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#define TIMELINE_CLIENT 0 /* default subclass */
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#define TIMELINE_ENGINE 1
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/**
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* List of breadcrumbs associated with GPU requests currently
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* outstanding.
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*/
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struct list_head requests;
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/* Contains an RCU guarded pointer to the last request. No reference is
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* held to the request, users must carefully acquire a reference to
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* the request using i915_gem_active_get_request_rcu(), or hold the
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* struct_mutex.
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*/
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struct i915_gem_active last_request;
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/**
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* We track the most recent seqno that we wait on in every context so
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* that we only have to emit a new await and dependency on a more
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* recent sync point. As the contexts may be executed out-of-order, we
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* have to track each individually and can not rely on an absolute
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* global_seqno. When we know that all tracked fences are completed
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* (i.e. when the driver is idle), we know that the syncmap is
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* redundant and we can discard it without loss of generality.
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*/
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struct i915_syncmap *sync;
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struct list_head link;
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const char *name;
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struct kref kref;
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};
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void i915_timeline_init(struct drm_i915_private *i915,
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struct i915_timeline *tl,
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const char *name);
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void i915_timeline_fini(struct i915_timeline *tl);
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static inline void
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i915_timeline_set_subclass(struct i915_timeline *timeline,
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unsigned int subclass)
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{
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lockdep_set_subclass(&timeline->lock, subclass);
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/*
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* Due to an interesting quirk in lockdep's internal debug tracking,
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* after setting a subclass we must ensure the lock is used. Otherwise,
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* nr_unused_locks is incremented once too often.
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*/
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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local_irq_disable();
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lock_map_acquire(&timeline->lock.dep_map);
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lock_map_release(&timeline->lock.dep_map);
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local_irq_enable();
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#endif
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}
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struct i915_timeline *
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i915_timeline_create(struct drm_i915_private *i915, const char *name);
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static inline struct i915_timeline *
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i915_timeline_get(struct i915_timeline *timeline)
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{
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kref_get(&timeline->kref);
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return timeline;
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}
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void __i915_timeline_free(struct kref *kref);
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static inline void i915_timeline_put(struct i915_timeline *timeline)
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{
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kref_put(&timeline->kref, __i915_timeline_free);
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}
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static inline int __i915_timeline_sync_set(struct i915_timeline *tl,
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u64 context, u32 seqno)
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{
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return i915_syncmap_set(&tl->sync, context, seqno);
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}
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static inline int i915_timeline_sync_set(struct i915_timeline *tl,
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const struct dma_fence *fence)
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{
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return __i915_timeline_sync_set(tl, fence->context, fence->seqno);
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}
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static inline bool __i915_timeline_sync_is_later(struct i915_timeline *tl,
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u64 context, u32 seqno)
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{
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return i915_syncmap_is_later(&tl->sync, context, seqno);
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}
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static inline bool i915_timeline_sync_is_later(struct i915_timeline *tl,
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const struct dma_fence *fence)
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{
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return __i915_timeline_sync_is_later(tl, fence->context, fence->seqno);
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}
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void i915_timelines_park(struct drm_i915_private *i915);
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#endif
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