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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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368f622c0d
If commands buffer claims a number of words that is higher than its BO can fit, a kernel OOPS will be fired on the out-of-bounds BO access. This was triggered by an opentegra Xorg driver that erroneously pushed too many commands to the pushbuf. The CDMA commands buffer address is 4 bytes aligned, so check its alignment. The maximum number of the CDMA gather fetches is 16383, add a check for it. Add a sanity check for the relocations in a same way. [ 46.829393] Unable to handle kernel paging request at virtual address f09b2000 ... [<c04a3ba4>] (host1x_job_pin) from [<c04dfcd0>] (tegra_drm_submit+0x474/0x510) [<c04dfcd0>] (tegra_drm_submit) from [<c04deea0>] (tegra_submit+0x50/0x6c) [<c04deea0>] (tegra_submit) from [<c04c07c0>] (drm_ioctl+0x1e4/0x3ec) [<c04c07c0>] (drm_ioctl) from [<c02541a0>] (do_vfs_ioctl+0x9c/0x8e4) [<c02541a0>] (do_vfs_ioctl) from [<c0254a1c>] (SyS_ioctl+0x34/0x5c) [<c0254a1c>] (SyS_ioctl) from [<c0107640>] (ret_fast_syscall+0x0/0x3c) Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Erik Faye-Lund <kusmabite@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
84 lines
2.1 KiB
C
84 lines
2.1 KiB
C
/*
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* Tegra host1x GEM implementation
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*
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* Copyright (c) 2012-2013, NVIDIA Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __HOST1X_GEM_H
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#define __HOST1X_GEM_H
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#include <linux/host1x.h>
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#include <drm/drm.h>
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#include <drm/drmP.h>
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#include <drm/drm_gem.h>
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#define TEGRA_BO_BOTTOM_UP (1 << 0)
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enum tegra_bo_tiling_mode {
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TEGRA_BO_TILING_MODE_PITCH,
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TEGRA_BO_TILING_MODE_TILED,
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TEGRA_BO_TILING_MODE_BLOCK,
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};
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struct tegra_bo_tiling {
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enum tegra_bo_tiling_mode mode;
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unsigned long value;
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};
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struct tegra_bo {
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struct drm_gem_object gem;
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struct host1x_bo base;
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unsigned long flags;
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struct sg_table *sgt;
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dma_addr_t paddr;
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void *vaddr;
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struct drm_mm_node *mm;
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unsigned long num_pages;
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struct page **pages;
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/* size of IOMMU mapping */
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size_t size;
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struct tegra_bo_tiling tiling;
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};
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static inline struct tegra_bo *to_tegra_bo(struct drm_gem_object *gem)
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{
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return container_of(gem, struct tegra_bo, gem);
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}
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static inline struct tegra_bo *host1x_to_tegra_bo(struct host1x_bo *bo)
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{
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return container_of(bo, struct tegra_bo, base);
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}
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struct tegra_bo *tegra_bo_create(struct drm_device *drm, size_t size,
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unsigned long flags);
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struct tegra_bo *tegra_bo_create_with_handle(struct drm_file *file,
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struct drm_device *drm,
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size_t size,
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unsigned long flags,
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u32 *handle);
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void tegra_bo_free_object(struct drm_gem_object *gem);
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int tegra_bo_dumb_create(struct drm_file *file, struct drm_device *drm,
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struct drm_mode_create_dumb *args);
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int tegra_bo_dumb_map_offset(struct drm_file *file, struct drm_device *drm,
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u32 handle, u64 *offset);
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int tegra_drm_mmap(struct file *file, struct vm_area_struct *vma);
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extern const struct vm_operations_struct tegra_bo_vm_ops;
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struct dma_buf *tegra_gem_prime_export(struct drm_device *drm,
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struct drm_gem_object *gem,
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int flags);
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struct drm_gem_object *tegra_gem_prime_import(struct drm_device *drm,
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struct dma_buf *buf);
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#endif
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