mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-25 20:20:55 +07:00
038b0a6d8d
kbuild explicitly includes this at build time. Signed-off-by: Dave Jones <davej@redhat.com>
199 lines
3.4 KiB
C
199 lines
3.4 KiB
C
/* arch/arm/mach-lh7a40x/clocks.c
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*
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* Copyright (C) 2004 Marc Singer
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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*/
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#include <linux/cpufreq.h>
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#include <asm/hardware.h>
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#include <asm/arch/clocks.h>
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#include <linux/err.h>
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struct module;
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struct icst525_params;
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struct clk {
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struct list_head node;
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unsigned long rate;
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struct module *owner;
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const char *name;
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// void *data;
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// const struct icst525_params *params;
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// void (*setvco)(struct clk *, struct icst525_vco vco);
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};
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int clk_register(struct clk *clk);
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void clk_unregister(struct clk *clk);
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/* ----- */
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#define MAINDIV1(c) (((c) >> 7) & 0x0f)
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#define MAINDIV2(c) (((c) >> 11) & 0x1f)
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#define PS(c) (((c) >> 18) & 0x03)
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#define PREDIV(c) (((c) >> 2) & 0x1f)
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#define HCLKDIV(c) (((c) >> 0) & 0x02)
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#define PCLKDIV(c) (((c) >> 16) & 0x03)
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unsigned int cpufreq_get (unsigned int cpu) /* in kHz */
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{
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return fclkfreq_get ()/1000;
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}
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EXPORT_SYMBOL(cpufreq_get);
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unsigned int fclkfreq_get (void)
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{
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unsigned int clkset = CSC_CLKSET;
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unsigned int gclk
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= XTAL_IN
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/ (1 << PS(clkset))
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* (MAINDIV1(clkset) + 2)
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/ (PREDIV(clkset) + 2)
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* (MAINDIV2(clkset) + 2)
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;
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return gclk;
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}
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unsigned int hclkfreq_get (void)
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{
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unsigned int clkset = CSC_CLKSET;
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unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1);
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return hclk;
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}
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unsigned int pclkfreq_get (void)
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{
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unsigned int clkset = CSC_CLKSET;
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int pclkdiv = PCLKDIV(clkset);
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unsigned int pclk;
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if (pclkdiv == 0x3)
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pclkdiv = 0x2;
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pclk = hclkfreq_get () / (1 << pclkdiv);
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return pclk;
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}
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/* ----- */
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static LIST_HEAD(clocks);
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static DECLARE_MUTEX(clocks_sem);
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struct clk *clk_get (struct device *dev, const char *id)
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{
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struct clk *p;
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struct clk *clk = ERR_PTR(-ENOENT);
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down (&clocks_sem);
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list_for_each_entry (p, &clocks, node) {
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if (strcmp (id, p->name) == 0
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&& try_module_get(p->owner)) {
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clk = p;
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break;
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}
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}
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up (&clocks_sem);
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return clk;
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}
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EXPORT_SYMBOL(clk_get);
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void clk_put (struct clk *clk)
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{
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module_put(clk->owner);
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}
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EXPORT_SYMBOL(clk_put);
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int clk_enable (struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable (struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_disable);
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int clk_use (struct clk *clk)
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{
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return 0;
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}
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EXPORT_SYMBOL(clk_use);
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void clk_unuse (struct clk *clk)
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{
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}
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EXPORT_SYMBOL(clk_unuse);
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unsigned long clk_get_rate (struct clk *clk)
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{
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return clk->rate;
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}
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EXPORT_SYMBOL(clk_get_rate);
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long clk_round_rate (struct clk *clk, unsigned long rate)
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{
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return rate;
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}
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EXPORT_SYMBOL(clk_round_rate);
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int clk_set_rate (struct clk *clk, unsigned long rate)
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{
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int ret = -EIO;
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return ret;
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}
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EXPORT_SYMBOL(clk_set_rate);
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#if 0
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/*
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* These are fixed clocks.
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*/
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static struct clk kmi_clk = {
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.name = "KMIREFCLK",
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.rate = 24000000,
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};
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static struct clk uart_clk = {
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.name = "UARTCLK",
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.rate = 24000000,
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};
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static struct clk mmci_clk = {
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.name = "MCLK",
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.rate = 33000000,
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};
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#endif
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static struct clk clcd_clk = {
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.name = "CLCDCLK",
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.rate = 0,
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};
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int clk_register (struct clk *clk)
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{
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down (&clocks_sem);
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list_add (&clk->node, &clocks);
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up (&clocks_sem);
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return 0;
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}
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EXPORT_SYMBOL(clk_register);
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void clk_unregister (struct clk *clk)
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{
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down (&clocks_sem);
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list_del (&clk->node);
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up (&clocks_sem);
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}
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EXPORT_SYMBOL(clk_unregister);
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static int __init clk_init (void)
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{
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clk_register(&clcd_clk);
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return 0;
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}
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arch_initcall(clk_init);
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