linux_dsm_epyc7002/arch/x86/events
Kan Liang 29b46dfb13 perf/x86/intel/uncore: Correct num_boxes for IIO and IRP
There are 6 IIO/IRP boxes for CBDMA, PCIe0-2, MCP 0 and MCP 1
separately. Correct the num_boxes.

Signed-off-by: Kan Liang <Kan.liang@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ak@linux.intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Cc: acme@kernel.org
Link: http://lkml.kernel.org/r/1505149816-12580-1-git-send-email-kan.liang@intel.com
2017-09-25 12:43:56 +02:00
..
amd perf/x86/amd/uncore: Get correct number of cores sharing last level cache 2017-08-10 12:08:39 +02:00
intel perf/x86/intel/uncore: Correct num_boxes for IIO and IRP 2017-09-25 12:43:56 +02:00
core.c Merge branch 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2017-09-04 08:39:02 -07:00
Kconfig
Makefile
msr.c perf/x86/msr: Add missing CPU IDs 2017-09-25 09:36:17 +02:00
perf_event.h perf/core, x86: Add PERF_SAMPLE_PHYS_ADDR 2017-08-29 15:09:25 +02:00