mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d027db132b
This contains the bulk of new SoC development for this merge window. Two new platforms have been added, the sunxi platforms (Allwinner A1x SoCs) by Maxime Ripard, and a generic Broadcom platform for a new series of ARMv7 platforms from them, where the hope is that we can keep the platform code generic enough to have them all share one mach directory. The new Broadcom platform is contributed by Christian Daudt. Highbank has grown support for Calxeda's next generation of hardware, ECX-2000. clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also taken on maintainership of the platform. Beyond this there has been a bunch of work from a number of people on converting more platforms to IRQ domains, pinctrl conversion, cleanup and general feature enablement across most of the active platforms. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQyLCjAAoJEIwa5zzehBx3AdQP/R+L3+EQMjiEWt/p7g/ql5Em 0SnP92CcGzrjgLTg9z1FeOazfOsGnkZAYUlDRkqfKobH3VqkhYFFtt1/0x0KMahm xcowHgMBOyimFdWT9vLK3J8U6DLui5XrEG9LGH2VL+lqmfjIyP/OOF3mVc0/+pV9 WTLAsYswdBRSeiNuF43kqlfrOwF6xsPLgiNMlc82w6BzHqoHu6dOif5M9MqWaApS V74DPmwLD371Tyit6aHqt3JOqpgiPSHlmxkzomK+5idcW3Pa7HnzzFYmx85dk/eN J2siqIkoOu7tEfjIbNZTL2MYoX4tUUKv4qZZ3IOl3YSWaV3P5ilMApF01XVrkk8E DWOMhzte9hC7L90W+/kCPLF1VyeAhCem2KQWUitO71fKur3r+3ZaUokNVvWzkJIL 7aduxAJOV2hfLgEqbjbjF3o4S8p63OV3kzivFJM1And15zDJo4+qqOh67+bPo4jj +R4du+SqzXriw4i3tDLGVpdjDffk4D41tbLzgkWAtvGyoP45yeYfHAzAh0pDFPRv ASfZVmZ5PhwAUAkIMnpC2sjgmxMYff3SYqmDgnsqXES7rbDH/hG+teymtHFTyUQp m+f60DNotSMcMvkLdvruLSB4aeTiwbfOqPn/g+aXYUlPuNMq1fVWgN7EJKWkamK4 nRwaJmLwx1/ojcVbpy2G =YMKB -----END PGP SIGNATURE----- Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC updates from Olof Johansson: "This contains the bulk of new SoC development for this merge window. Two new platforms have been added, the sunxi platforms (Allwinner A1x SoCs) by Maxime Ripard, and a generic Broadcom platform for a new series of ARMv7 platforms from them, where the hope is that we can keep the platform code generic enough to have them all share one mach directory. The new Broadcom platform is contributed by Christian Daudt. Highbank has grown support for Calxeda's next generation of hardware, ECX-2000. clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also taken on maintainership of the platform. Beyond this there has been a bunch of work from a number of people on converting more platforms to IRQ domains, pinctrl conversion, cleanup and general feature enablement across most of the active platforms." Fix up trivial conflicts as per Olof. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits) mfd: vexpress-sysreg: Remove LEDs code irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids irq: versatile: delete dangling variable ARM: sunxi: add missing include for mdelay() ARM: EXYNOS: Avoid early use of of_machine_is_compatible() ARM: dts: add node for PL330 MDMA1 controller for exynos4 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 ARM: EXYNOS: add UART3 to DEBUG_LL ports ARM: S3C24XX: Add clkdev entry for camif-upll clock ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers ARM: sunxi: Add missing sun4i.dtsi file pinctrl: samsung: Do not initialise statics to 0 ARM i.MX6: remove gate_mask from pllv3 ARM i.MX6: Fix ethernet PLL clocks ARM i.MX6: rename PLLs according to datasheet ARM i.MX6: Add pwm support ARM i.MX51: Add pwm support ARM i.MX53: Add pwm support ARM: mx5: Replace clk_register_clkdev with clock DT lookup ...
414 lines
9.2 KiB
C
414 lines
9.2 KiB
C
/*
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* linux/arch/arm/kernel/smp_twd.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/smp.h>
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#include <linux/jiffies.h>
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <asm/smp_twd.h>
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#include <asm/localtimer.h>
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#include <asm/hardware/gic.h>
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/* set up by the platform code */
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static void __iomem *twd_base;
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static struct clk *twd_clk;
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static unsigned long twd_timer_rate;
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static bool common_setup_called;
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static DEFINE_PER_CPU(bool, percpu_setup_called);
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static struct clock_event_device __percpu **twd_evt;
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static int twd_ppi;
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static void twd_set_mode(enum clock_event_mode mode,
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struct clock_event_device *clk)
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{
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unsigned long ctrl;
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE
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| TWD_TIMER_CONTROL_PERIODIC;
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__raw_writel(DIV_ROUND_CLOSEST(twd_timer_rate, HZ),
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twd_base + TWD_TIMER_LOAD);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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/* period set, and timer enabled in 'next_event' hook */
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ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT;
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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default:
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ctrl = 0;
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}
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__raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
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}
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static int twd_set_next_event(unsigned long evt,
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struct clock_event_device *unused)
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{
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unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL);
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ctrl |= TWD_TIMER_CONTROL_ENABLE;
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__raw_writel(evt, twd_base + TWD_TIMER_COUNTER);
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__raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL);
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return 0;
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}
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/*
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* local_timer_ack: checks for a local timer interrupt.
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*
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* If a local timer interrupt has occurred, acknowledge and return 1.
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* Otherwise, return 0.
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*/
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static int twd_timer_ack(void)
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{
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if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) {
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__raw_writel(1, twd_base + TWD_TIMER_INTSTAT);
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return 1;
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}
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return 0;
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}
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static void twd_timer_stop(struct clock_event_device *clk)
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{
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twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk);
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disable_percpu_irq(clk->irq);
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}
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#ifdef CONFIG_COMMON_CLK
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/*
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* Updates clockevent frequency when the cpu frequency changes.
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* Called on the cpu that is changing frequency with interrupts disabled.
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*/
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static void twd_update_frequency(void *new_rate)
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{
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twd_timer_rate = *((unsigned long *) new_rate);
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clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
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}
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static int twd_rate_change(struct notifier_block *nb,
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unsigned long flags, void *data)
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{
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struct clk_notifier_data *cnd = data;
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/*
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* The twd clock events must be reprogrammed to account for the new
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* frequency. The timer is local to a cpu, so cross-call to the
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* changing cpu.
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*/
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if (flags == POST_RATE_CHANGE)
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smp_call_function(twd_update_frequency,
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(void *)&cnd->new_rate, 1);
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return NOTIFY_OK;
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}
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static struct notifier_block twd_clk_nb = {
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.notifier_call = twd_rate_change,
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};
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static int twd_clk_init(void)
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{
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if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
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return clk_notifier_register(twd_clk, &twd_clk_nb);
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return 0;
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}
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core_initcall(twd_clk_init);
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#elif defined (CONFIG_CPU_FREQ)
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#include <linux/cpufreq.h>
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/*
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* Updates clockevent frequency when the cpu frequency changes.
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* Called on the cpu that is changing frequency with interrupts disabled.
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*/
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static void twd_update_frequency(void *data)
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{
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twd_timer_rate = clk_get_rate(twd_clk);
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clockevents_update_freq(*__this_cpu_ptr(twd_evt), twd_timer_rate);
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}
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static int twd_cpufreq_transition(struct notifier_block *nb,
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unsigned long state, void *data)
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{
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struct cpufreq_freqs *freqs = data;
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/*
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* The twd clock events must be reprogrammed to account for the new
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* frequency. The timer is local to a cpu, so cross-call to the
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* changing cpu.
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*/
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if (state == CPUFREQ_POSTCHANGE || state == CPUFREQ_RESUMECHANGE)
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smp_call_function_single(freqs->cpu, twd_update_frequency,
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NULL, 1);
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return NOTIFY_OK;
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}
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static struct notifier_block twd_cpufreq_nb = {
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.notifier_call = twd_cpufreq_transition,
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};
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static int twd_cpufreq_init(void)
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{
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if (twd_evt && *__this_cpu_ptr(twd_evt) && !IS_ERR(twd_clk))
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return cpufreq_register_notifier(&twd_cpufreq_nb,
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CPUFREQ_TRANSITION_NOTIFIER);
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return 0;
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}
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core_initcall(twd_cpufreq_init);
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#endif
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static void __cpuinit twd_calibrate_rate(void)
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{
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unsigned long count;
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u64 waitjiffies;
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/*
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* If this is the first time round, we need to work out how fast
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* the timer ticks
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*/
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if (twd_timer_rate == 0) {
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printk(KERN_INFO "Calibrating local timer... ");
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/* Wait for a tick to start */
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waitjiffies = get_jiffies_64() + 1;
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while (get_jiffies_64() < waitjiffies)
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udelay(10);
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/* OK, now the tick has started, let's get the timer going */
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waitjiffies += 5;
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/* enable, no interrupt or reload */
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__raw_writel(0x1, twd_base + TWD_TIMER_CONTROL);
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/* maximum value */
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__raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER);
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while (get_jiffies_64() < waitjiffies)
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udelay(10);
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count = __raw_readl(twd_base + TWD_TIMER_COUNTER);
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twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5);
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printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000,
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(twd_timer_rate / 10000) % 100);
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}
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}
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static irqreturn_t twd_handler(int irq, void *dev_id)
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{
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struct clock_event_device *evt = *(struct clock_event_device **)dev_id;
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if (twd_timer_ack()) {
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static struct clk *twd_get_clock(void)
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{
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struct clk *clk;
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int err;
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clk = clk_get_sys("smp_twd", NULL);
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if (IS_ERR(clk)) {
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pr_err("smp_twd: clock not found: %d\n", (int)PTR_ERR(clk));
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return clk;
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}
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err = clk_prepare_enable(clk);
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if (err) {
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pr_err("smp_twd: clock failed to prepare+enable: %d\n", err);
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clk_put(clk);
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return ERR_PTR(err);
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}
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return clk;
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}
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/*
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* Setup the local clock events for a CPU.
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*/
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static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
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{
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struct clock_event_device **this_cpu_clk;
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int cpu = smp_processor_id();
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/*
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* If the basic setup for this CPU has been done before don't
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* bother with the below.
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*/
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if (per_cpu(percpu_setup_called, cpu)) {
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__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
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clockevents_register_device(*__this_cpu_ptr(twd_evt));
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enable_percpu_irq(clk->irq, 0);
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return 0;
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}
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per_cpu(percpu_setup_called, cpu) = true;
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/*
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* This stuff only need to be done once for the entire TWD cluster
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* during the runtime of the system.
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*/
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if (!common_setup_called) {
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twd_clk = twd_get_clock();
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/*
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* We use IS_ERR_OR_NULL() here, because if the clock stubs
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* are active we will get a valid clk reference which is
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* however NULL and will return the rate 0. In that case we
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* need to calibrate the rate instead.
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*/
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if (!IS_ERR_OR_NULL(twd_clk))
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twd_timer_rate = clk_get_rate(twd_clk);
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else
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twd_calibrate_rate();
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common_setup_called = true;
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}
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/*
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* The following is done once per CPU the first time .setup() is
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* called.
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*/
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__raw_writel(0, twd_base + TWD_TIMER_CONTROL);
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clk->name = "local_timer";
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clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
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CLOCK_EVT_FEAT_C3STOP;
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clk->rating = 350;
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clk->set_mode = twd_set_mode;
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clk->set_next_event = twd_set_next_event;
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clk->irq = twd_ppi;
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this_cpu_clk = __this_cpu_ptr(twd_evt);
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*this_cpu_clk = clk;
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clockevents_config_and_register(clk, twd_timer_rate,
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0xf, 0xffffffff);
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enable_percpu_irq(clk->irq, 0);
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return 0;
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}
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static struct local_timer_ops twd_lt_ops __cpuinitdata = {
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.setup = twd_timer_setup,
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.stop = twd_timer_stop,
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};
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static int __init twd_local_timer_common_register(void)
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{
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int err;
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twd_evt = alloc_percpu(struct clock_event_device *);
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if (!twd_evt) {
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err = -ENOMEM;
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goto out_free;
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}
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err = request_percpu_irq(twd_ppi, twd_handler, "twd", twd_evt);
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if (err) {
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pr_err("twd: can't register interrupt %d (%d)\n", twd_ppi, err);
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goto out_free;
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}
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err = local_timer_register(&twd_lt_ops);
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if (err)
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goto out_irq;
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return 0;
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out_irq:
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free_percpu_irq(twd_ppi, twd_evt);
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out_free:
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iounmap(twd_base);
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twd_base = NULL;
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free_percpu(twd_evt);
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return err;
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}
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int __init twd_local_timer_register(struct twd_local_timer *tlt)
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{
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if (twd_base || twd_evt)
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return -EBUSY;
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twd_ppi = tlt->res[1].start;
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twd_base = ioremap(tlt->res[0].start, resource_size(&tlt->res[0]));
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if (!twd_base)
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return -ENOMEM;
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return twd_local_timer_common_register();
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}
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#ifdef CONFIG_OF
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const static struct of_device_id twd_of_match[] __initconst = {
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{ .compatible = "arm,cortex-a9-twd-timer", },
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{ .compatible = "arm,cortex-a5-twd-timer", },
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{ .compatible = "arm,arm11mp-twd-timer", },
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{ },
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};
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void __init twd_local_timer_of_register(void)
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{
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struct device_node *np;
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int err;
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np = of_find_matching_node(NULL, twd_of_match);
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if (!np)
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return;
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twd_ppi = irq_of_parse_and_map(np, 0);
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if (!twd_ppi) {
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err = -EINVAL;
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goto out;
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}
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twd_base = of_iomap(np, 0);
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if (!twd_base) {
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err = -ENOMEM;
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goto out;
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}
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err = twd_local_timer_common_register();
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out:
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WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
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}
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#endif
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