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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-28 03:05:21 +07:00
dd1ed10817
When there are many RC QPs and an RDMA READ request is sent, timeouts occur on the requester side because of fairness among RC QPs on their relative SDMA engine on the responder side. This also hits write and send, but to a lesser extent. Complicating the issue is that the current code checks if workqueue is congested before scheduling other QPs, however, this check is based on the number of active entries in the workqueue, which was found to be too big to for workqueue_congested() to be effective. Fix by reducing the number of active entries as revealed by experimentation from the default of num_sdma to HFI1_MAX_ACTIVE_WORKQUEUE_ENTRIES. Retry counts were monitored to determine the correct value. Tracing to investigate any future issues is also added. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Sebastian Sanchez <sebastian.sanchez@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
720 lines
20 KiB
C
720 lines
20 KiB
C
/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#if !defined(__HFI1_TRACE_TX_H) || defined(TRACE_HEADER_MULTI_READ)
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#define __HFI1_TRACE_TX_H
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#include <linux/tracepoint.h>
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#include <linux/trace_seq.h>
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#include "hfi.h"
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#include "mad.h"
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#include "sdma.h"
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const char *parse_sdma_flags(struct trace_seq *p, u64 desc0, u64 desc1);
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#define __parse_sdma_flags(desc0, desc1) parse_sdma_flags(p, desc0, desc1)
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#undef TRACE_SYSTEM
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#define TRACE_SYSTEM hfi1_tx
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TRACE_EVENT(hfi1_piofree,
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TP_PROTO(struct send_context *sc, int extra),
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TP_ARGS(sc, extra),
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TP_STRUCT__entry(DD_DEV_ENTRY(sc->dd)
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__field(u32, sw_index)
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__field(u32, hw_context)
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__field(int, extra)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sc->dd);
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__entry->sw_index = sc->sw_index;
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__entry->hw_context = sc->hw_context;
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__entry->extra = extra;
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),
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TP_printk("[%s] ctxt %u(%u) extra %d",
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__get_str(dev),
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__entry->sw_index,
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__entry->hw_context,
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__entry->extra
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)
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);
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TRACE_EVENT(hfi1_wantpiointr,
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TP_PROTO(struct send_context *sc, u32 needint, u64 credit_ctrl),
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TP_ARGS(sc, needint, credit_ctrl),
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TP_STRUCT__entry(DD_DEV_ENTRY(sc->dd)
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__field(u32, sw_index)
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__field(u32, hw_context)
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__field(u32, needint)
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__field(u64, credit_ctrl)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sc->dd);
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__entry->sw_index = sc->sw_index;
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__entry->hw_context = sc->hw_context;
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__entry->needint = needint;
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__entry->credit_ctrl = credit_ctrl;
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),
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TP_printk("[%s] ctxt %u(%u) on %d credit_ctrl 0x%llx",
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__get_str(dev),
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__entry->sw_index,
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__entry->hw_context,
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__entry->needint,
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(unsigned long long)__entry->credit_ctrl
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)
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);
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DECLARE_EVENT_CLASS(hfi1_qpsleepwakeup_template,
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TP_PROTO(struct rvt_qp *qp, u32 flags),
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TP_ARGS(qp, flags),
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TP_STRUCT__entry(
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DD_DEV_ENTRY(dd_from_ibdev(qp->ibqp.device))
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__field(u32, qpn)
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__field(u32, flags)
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__field(u32, s_flags)
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),
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TP_fast_assign(
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DD_DEV_ASSIGN(dd_from_ibdev(qp->ibqp.device))
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__entry->flags = flags;
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__entry->qpn = qp->ibqp.qp_num;
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__entry->s_flags = qp->s_flags;
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),
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TP_printk(
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"[%s] qpn 0x%x flags 0x%x s_flags 0x%x",
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__get_str(dev),
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__entry->qpn,
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__entry->flags,
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__entry->s_flags
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)
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);
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DEFINE_EVENT(hfi1_qpsleepwakeup_template, hfi1_qpwakeup,
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TP_PROTO(struct rvt_qp *qp, u32 flags),
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TP_ARGS(qp, flags));
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DEFINE_EVENT(hfi1_qpsleepwakeup_template, hfi1_qpsleep,
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TP_PROTO(struct rvt_qp *qp, u32 flags),
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TP_ARGS(qp, flags));
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TRACE_EVENT(hfi1_sdma_descriptor,
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TP_PROTO(struct sdma_engine *sde,
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u64 desc0,
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u64 desc1,
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u16 e,
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void *descp),
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TP_ARGS(sde, desc0, desc1, e, descp),
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TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
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__field(void *, descp)
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__field(u64, desc0)
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__field(u64, desc1)
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__field(u16, e)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
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__entry->desc0 = desc0;
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__entry->desc1 = desc1;
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__entry->idx = sde->this_idx;
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__entry->descp = descp;
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__entry->e = e;
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),
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TP_printk(
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"[%s] SDE(%u) flags:%s addr:0x%016llx gen:%u len:%u d0:%016llx d1:%016llx to %p,%u",
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__get_str(dev),
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__entry->idx,
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__parse_sdma_flags(__entry->desc0, __entry->desc1),
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(__entry->desc0 >> SDMA_DESC0_PHY_ADDR_SHIFT) &
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SDMA_DESC0_PHY_ADDR_MASK,
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(u8)((__entry->desc1 >> SDMA_DESC1_GENERATION_SHIFT) &
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SDMA_DESC1_GENERATION_MASK),
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(u16)((__entry->desc0 >> SDMA_DESC0_BYTE_COUNT_SHIFT) &
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SDMA_DESC0_BYTE_COUNT_MASK),
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__entry->desc0,
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__entry->desc1,
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__entry->descp,
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__entry->e
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)
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);
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TRACE_EVENT(hfi1_sdma_engine_select,
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TP_PROTO(struct hfi1_devdata *dd, u32 sel, u8 vl, u8 idx),
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TP_ARGS(dd, sel, vl, idx),
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TP_STRUCT__entry(DD_DEV_ENTRY(dd)
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__field(u32, sel)
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__field(u8, vl)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(dd);
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__entry->sel = sel;
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__entry->vl = vl;
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__entry->idx = idx;
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),
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TP_printk("[%s] selecting SDE %u sel 0x%x vl %u",
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__get_str(dev),
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__entry->idx,
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__entry->sel,
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__entry->vl
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)
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);
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DECLARE_EVENT_CLASS(hfi1_sdma_engine_class,
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TP_PROTO(struct sdma_engine *sde, u64 status),
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TP_ARGS(sde, status),
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TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
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__field(u64, status)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
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__entry->status = status;
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__entry->idx = sde->this_idx;
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),
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TP_printk("[%s] SDE(%u) status %llx",
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__get_str(dev),
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__entry->idx,
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(unsigned long long)__entry->status
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)
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);
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DEFINE_EVENT(hfi1_sdma_engine_class, hfi1_sdma_engine_interrupt,
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TP_PROTO(struct sdma_engine *sde, u64 status),
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TP_ARGS(sde, status)
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);
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DEFINE_EVENT(hfi1_sdma_engine_class, hfi1_sdma_engine_progress,
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TP_PROTO(struct sdma_engine *sde, u64 status),
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TP_ARGS(sde, status)
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);
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DECLARE_EVENT_CLASS(hfi1_sdma_ahg_ad,
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TP_PROTO(struct sdma_engine *sde, int aidx),
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TP_ARGS(sde, aidx),
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TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
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__field(int, aidx)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
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__entry->idx = sde->this_idx;
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__entry->aidx = aidx;
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),
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TP_printk("[%s] SDE(%u) aidx %d",
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__get_str(dev),
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__entry->idx,
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__entry->aidx
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)
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);
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DEFINE_EVENT(hfi1_sdma_ahg_ad, hfi1_ahg_allocate,
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TP_PROTO(struct sdma_engine *sde, int aidx),
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TP_ARGS(sde, aidx));
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DEFINE_EVENT(hfi1_sdma_ahg_ad, hfi1_ahg_deallocate,
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TP_PROTO(struct sdma_engine *sde, int aidx),
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TP_ARGS(sde, aidx));
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#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
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TRACE_EVENT(hfi1_sdma_progress,
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TP_PROTO(struct sdma_engine *sde,
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u16 hwhead,
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u16 swhead,
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struct sdma_txreq *txp
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),
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TP_ARGS(sde, hwhead, swhead, txp),
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TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
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__field(u64, sn)
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__field(u16, hwhead)
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__field(u16, swhead)
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__field(u16, txnext)
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__field(u16, tx_tail)
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__field(u16, tx_head)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
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__entry->hwhead = hwhead;
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__entry->swhead = swhead;
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__entry->tx_tail = sde->tx_tail;
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__entry->tx_head = sde->tx_head;
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__entry->txnext = txp ? txp->next_descq_idx : ~0;
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__entry->idx = sde->this_idx;
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__entry->sn = txp ? txp->sn : ~0;
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),
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TP_printk(
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"[%s] SDE(%u) sn %llu hwhead %u swhead %u next_descq_idx %u tx_head %u tx_tail %u",
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__get_str(dev),
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__entry->idx,
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__entry->sn,
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__entry->hwhead,
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__entry->swhead,
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__entry->txnext,
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__entry->tx_head,
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__entry->tx_tail
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)
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);
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#else
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TRACE_EVENT(hfi1_sdma_progress,
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TP_PROTO(struct sdma_engine *sde,
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u16 hwhead, u16 swhead,
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struct sdma_txreq *txp
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),
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TP_ARGS(sde, hwhead, swhead, txp),
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TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
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__field(u16, hwhead)
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__field(u16, swhead)
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__field(u16, txnext)
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__field(u16, tx_tail)
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__field(u16, tx_head)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
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__entry->hwhead = hwhead;
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__entry->swhead = swhead;
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__entry->tx_tail = sde->tx_tail;
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__entry->tx_head = sde->tx_head;
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__entry->txnext = txp ? txp->next_descq_idx : ~0;
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__entry->idx = sde->this_idx;
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),
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TP_printk(
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"[%s] SDE(%u) hwhead %u swhead %u next_descq_idx %u tx_head %u tx_tail %u",
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__get_str(dev),
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__entry->idx,
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__entry->hwhead,
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__entry->swhead,
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__entry->txnext,
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__entry->tx_head,
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__entry->tx_tail
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)
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);
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#endif
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DECLARE_EVENT_CLASS(hfi1_sdma_sn,
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TP_PROTO(struct sdma_engine *sde, u64 sn),
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TP_ARGS(sde, sn),
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TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
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__field(u64, sn)
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__field(u8, idx)
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),
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TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
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__entry->sn = sn;
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__entry->idx = sde->this_idx;
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),
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TP_printk("[%s] SDE(%u) sn %llu",
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__get_str(dev),
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__entry->idx,
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__entry->sn
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)
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);
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DEFINE_EVENT(hfi1_sdma_sn, hfi1_sdma_out_sn,
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TP_PROTO(
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struct sdma_engine *sde,
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u64 sn
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),
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TP_ARGS(sde, sn)
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);
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DEFINE_EVENT(hfi1_sdma_sn, hfi1_sdma_in_sn,
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TP_PROTO(struct sdma_engine *sde, u64 sn),
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TP_ARGS(sde, sn)
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);
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#define USDMA_HDR_FORMAT \
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"[%s:%u:%u:%u] PBC=(0x%x 0x%x) LRH=(0x%x 0x%x) BTH=(0x%x 0x%x 0x%x) KDETH=(0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x) TIDVal=0x%x"
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TRACE_EVENT(hfi1_sdma_user_header,
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TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 req,
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struct hfi1_pkt_header *hdr, u32 tidval),
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TP_ARGS(dd, ctxt, subctxt, req, hdr, tidval),
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TP_STRUCT__entry(
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DD_DEV_ENTRY(dd)
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__field(u16, ctxt)
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__field(u8, subctxt)
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__field(u16, req)
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__field(u32, pbc0)
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__field(u32, pbc1)
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__field(u32, lrh0)
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__field(u32, lrh1)
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__field(u32, bth0)
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__field(u32, bth1)
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__field(u32, bth2)
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__field(u32, kdeth0)
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__field(u32, kdeth1)
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__field(u32, kdeth2)
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__field(u32, kdeth3)
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__field(u32, kdeth4)
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__field(u32, kdeth5)
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__field(u32, kdeth6)
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__field(u32, kdeth7)
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__field(u32, kdeth8)
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__field(u32, tidval)
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),
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TP_fast_assign(
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__le32 *pbc = (__le32 *)hdr->pbc;
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__be32 *lrh = (__be32 *)hdr->lrh;
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__be32 *bth = (__be32 *)hdr->bth;
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__le32 *kdeth = (__le32 *)&hdr->kdeth;
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DD_DEV_ASSIGN(dd);
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__entry->ctxt = ctxt;
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__entry->subctxt = subctxt;
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__entry->req = req;
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__entry->pbc0 = le32_to_cpu(pbc[0]);
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__entry->pbc1 = le32_to_cpu(pbc[1]);
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__entry->lrh0 = be32_to_cpu(lrh[0]);
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__entry->lrh1 = be32_to_cpu(lrh[1]);
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__entry->bth0 = be32_to_cpu(bth[0]);
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__entry->bth1 = be32_to_cpu(bth[1]);
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__entry->bth2 = be32_to_cpu(bth[2]);
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__entry->kdeth0 = le32_to_cpu(kdeth[0]);
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__entry->kdeth1 = le32_to_cpu(kdeth[1]);
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__entry->kdeth2 = le32_to_cpu(kdeth[2]);
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__entry->kdeth3 = le32_to_cpu(kdeth[3]);
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__entry->kdeth4 = le32_to_cpu(kdeth[4]);
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__entry->kdeth5 = le32_to_cpu(kdeth[5]);
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__entry->kdeth6 = le32_to_cpu(kdeth[6]);
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__entry->kdeth7 = le32_to_cpu(kdeth[7]);
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__entry->kdeth8 = le32_to_cpu(kdeth[8]);
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__entry->tidval = tidval;
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),
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TP_printk(USDMA_HDR_FORMAT,
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__get_str(dev),
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__entry->ctxt,
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__entry->subctxt,
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__entry->req,
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__entry->pbc1,
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__entry->pbc0,
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__entry->lrh0,
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__entry->lrh1,
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__entry->bth0,
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__entry->bth1,
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__entry->bth2,
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__entry->kdeth0,
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__entry->kdeth1,
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__entry->kdeth2,
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__entry->kdeth3,
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__entry->kdeth4,
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__entry->kdeth5,
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__entry->kdeth6,
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__entry->kdeth7,
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__entry->kdeth8,
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__entry->tidval
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|
)
|
|
);
|
|
|
|
#define SDMA_UREQ_FMT \
|
|
"[%s:%u:%u] ver/op=0x%x, iovcnt=%u, npkts=%u, frag=%u, idx=%u"
|
|
TRACE_EVENT(hfi1_sdma_user_reqinfo,
|
|
TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 *i),
|
|
TP_ARGS(dd, ctxt, subctxt, i),
|
|
TP_STRUCT__entry(
|
|
DD_DEV_ENTRY(dd);
|
|
__field(u16, ctxt)
|
|
__field(u8, subctxt)
|
|
__field(u8, ver_opcode)
|
|
__field(u8, iovcnt)
|
|
__field(u16, npkts)
|
|
__field(u16, fragsize)
|
|
__field(u16, comp_idx)
|
|
),
|
|
TP_fast_assign(
|
|
DD_DEV_ASSIGN(dd);
|
|
__entry->ctxt = ctxt;
|
|
__entry->subctxt = subctxt;
|
|
__entry->ver_opcode = i[0] & 0xff;
|
|
__entry->iovcnt = (i[0] >> 8) & 0xff;
|
|
__entry->npkts = i[1];
|
|
__entry->fragsize = i[2];
|
|
__entry->comp_idx = i[3];
|
|
),
|
|
TP_printk(SDMA_UREQ_FMT,
|
|
__get_str(dev),
|
|
__entry->ctxt,
|
|
__entry->subctxt,
|
|
__entry->ver_opcode,
|
|
__entry->iovcnt,
|
|
__entry->npkts,
|
|
__entry->fragsize,
|
|
__entry->comp_idx
|
|
)
|
|
);
|
|
|
|
#define usdma_complete_name(st) { st, #st }
|
|
#define show_usdma_complete_state(st) \
|
|
__print_symbolic(st, \
|
|
usdma_complete_name(FREE), \
|
|
usdma_complete_name(QUEUED), \
|
|
usdma_complete_name(COMPLETE), \
|
|
usdma_complete_name(ERROR))
|
|
|
|
TRACE_EVENT(hfi1_sdma_user_completion,
|
|
TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 idx,
|
|
u8 state, int code),
|
|
TP_ARGS(dd, ctxt, subctxt, idx, state, code),
|
|
TP_STRUCT__entry(
|
|
DD_DEV_ENTRY(dd)
|
|
__field(u16, ctxt)
|
|
__field(u8, subctxt)
|
|
__field(u16, idx)
|
|
__field(u8, state)
|
|
__field(int, code)
|
|
),
|
|
TP_fast_assign(
|
|
DD_DEV_ASSIGN(dd);
|
|
__entry->ctxt = ctxt;
|
|
__entry->subctxt = subctxt;
|
|
__entry->idx = idx;
|
|
__entry->state = state;
|
|
__entry->code = code;
|
|
),
|
|
TP_printk("[%s:%u:%u:%u] SDMA completion state %s (%d)",
|
|
__get_str(dev), __entry->ctxt, __entry->subctxt,
|
|
__entry->idx, show_usdma_complete_state(__entry->state),
|
|
__entry->code)
|
|
);
|
|
|
|
const char *print_u32_array(struct trace_seq *, u32 *, int);
|
|
#define __print_u32_hex(arr, len) print_u32_array(p, arr, len)
|
|
|
|
TRACE_EVENT(hfi1_sdma_user_header_ahg,
|
|
TP_PROTO(struct hfi1_devdata *dd, u16 ctxt, u8 subctxt, u16 req,
|
|
u8 sde, u8 ahgidx, u32 *ahg, int len, u32 tidval),
|
|
TP_ARGS(dd, ctxt, subctxt, req, sde, ahgidx, ahg, len, tidval),
|
|
TP_STRUCT__entry(
|
|
DD_DEV_ENTRY(dd)
|
|
__field(u16, ctxt)
|
|
__field(u8, subctxt)
|
|
__field(u16, req)
|
|
__field(u8, sde)
|
|
__field(u8, idx)
|
|
__field(int, len)
|
|
__field(u32, tidval)
|
|
__array(u32, ahg, 10)
|
|
),
|
|
TP_fast_assign(
|
|
DD_DEV_ASSIGN(dd);
|
|
__entry->ctxt = ctxt;
|
|
__entry->subctxt = subctxt;
|
|
__entry->req = req;
|
|
__entry->sde = sde;
|
|
__entry->idx = ahgidx;
|
|
__entry->len = len;
|
|
__entry->tidval = tidval;
|
|
memcpy(__entry->ahg, ahg, len * sizeof(u32));
|
|
),
|
|
TP_printk("[%s:%u:%u:%u] (SDE%u/AHG%u) ahg[0-%d]=(%s) TIDVal=0x%x",
|
|
__get_str(dev),
|
|
__entry->ctxt,
|
|
__entry->subctxt,
|
|
__entry->req,
|
|
__entry->sde,
|
|
__entry->idx,
|
|
__entry->len - 1,
|
|
__print_u32_hex(__entry->ahg, __entry->len),
|
|
__entry->tidval
|
|
)
|
|
);
|
|
|
|
TRACE_EVENT(hfi1_sdma_state,
|
|
TP_PROTO(struct sdma_engine *sde,
|
|
const char *cstate,
|
|
const char *nstate
|
|
),
|
|
TP_ARGS(sde, cstate, nstate),
|
|
TP_STRUCT__entry(DD_DEV_ENTRY(sde->dd)
|
|
__string(curstate, cstate)
|
|
__string(newstate, nstate)
|
|
),
|
|
TP_fast_assign(DD_DEV_ASSIGN(sde->dd);
|
|
__assign_str(curstate, cstate);
|
|
__assign_str(newstate, nstate);
|
|
),
|
|
TP_printk("[%s] current state %s new state %s",
|
|
__get_str(dev),
|
|
__get_str(curstate),
|
|
__get_str(newstate)
|
|
)
|
|
);
|
|
|
|
#define BCT_FORMAT \
|
|
"shared_limit %x vls 0-7 [%x,%x][%x,%x][%x,%x][%x,%x][%x,%x][%x,%x][%x,%x][%x,%x] 15 [%x,%x]"
|
|
|
|
#define BCT(field) \
|
|
be16_to_cpu( \
|
|
((struct buffer_control *)__get_dynamic_array(bct))->field \
|
|
)
|
|
|
|
DECLARE_EVENT_CLASS(hfi1_bct_template,
|
|
TP_PROTO(struct hfi1_devdata *dd,
|
|
struct buffer_control *bc),
|
|
TP_ARGS(dd, bc),
|
|
TP_STRUCT__entry(DD_DEV_ENTRY(dd)
|
|
__dynamic_array(u8, bct, sizeof(*bc))
|
|
),
|
|
TP_fast_assign(DD_DEV_ASSIGN(dd);
|
|
memcpy(__get_dynamic_array(bct), bc,
|
|
sizeof(*bc));
|
|
),
|
|
TP_printk(BCT_FORMAT,
|
|
BCT(overall_shared_limit),
|
|
|
|
BCT(vl[0].dedicated),
|
|
BCT(vl[0].shared),
|
|
|
|
BCT(vl[1].dedicated),
|
|
BCT(vl[1].shared),
|
|
|
|
BCT(vl[2].dedicated),
|
|
BCT(vl[2].shared),
|
|
|
|
BCT(vl[3].dedicated),
|
|
BCT(vl[3].shared),
|
|
|
|
BCT(vl[4].dedicated),
|
|
BCT(vl[4].shared),
|
|
|
|
BCT(vl[5].dedicated),
|
|
BCT(vl[5].shared),
|
|
|
|
BCT(vl[6].dedicated),
|
|
BCT(vl[6].shared),
|
|
|
|
BCT(vl[7].dedicated),
|
|
BCT(vl[7].shared),
|
|
|
|
BCT(vl[15].dedicated),
|
|
BCT(vl[15].shared)
|
|
)
|
|
);
|
|
|
|
DEFINE_EVENT(hfi1_bct_template, bct_set,
|
|
TP_PROTO(struct hfi1_devdata *dd, struct buffer_control *bc),
|
|
TP_ARGS(dd, bc));
|
|
|
|
DEFINE_EVENT(hfi1_bct_template, bct_get,
|
|
TP_PROTO(struct hfi1_devdata *dd, struct buffer_control *bc),
|
|
TP_ARGS(dd, bc));
|
|
|
|
TRACE_EVENT(
|
|
hfi1_qp_send_completion,
|
|
TP_PROTO(struct rvt_qp *qp, struct rvt_swqe *wqe, u32 idx),
|
|
TP_ARGS(qp, wqe, idx),
|
|
TP_STRUCT__entry(
|
|
DD_DEV_ENTRY(dd_from_ibdev(qp->ibqp.device))
|
|
__field(struct rvt_swqe *, wqe)
|
|
__field(u64, wr_id)
|
|
__field(u32, qpn)
|
|
__field(u32, qpt)
|
|
__field(u32, length)
|
|
__field(u32, idx)
|
|
__field(u32, ssn)
|
|
__field(enum ib_wr_opcode, opcode)
|
|
__field(int, send_flags)
|
|
),
|
|
TP_fast_assign(
|
|
DD_DEV_ASSIGN(dd_from_ibdev(qp->ibqp.device))
|
|
__entry->wqe = wqe;
|
|
__entry->wr_id = wqe->wr.wr_id;
|
|
__entry->qpn = qp->ibqp.qp_num;
|
|
__entry->qpt = qp->ibqp.qp_type;
|
|
__entry->length = wqe->length;
|
|
__entry->idx = idx;
|
|
__entry->ssn = wqe->ssn;
|
|
__entry->opcode = wqe->wr.opcode;
|
|
__entry->send_flags = wqe->wr.send_flags;
|
|
),
|
|
TP_printk(
|
|
"[%s] qpn 0x%x qpt %u wqe %p idx %u wr_id %llx length %u ssn %u opcode %x send_flags %x",
|
|
__get_str(dev),
|
|
__entry->qpn,
|
|
__entry->qpt,
|
|
__entry->wqe,
|
|
__entry->idx,
|
|
__entry->wr_id,
|
|
__entry->length,
|
|
__entry->ssn,
|
|
__entry->opcode,
|
|
__entry->send_flags
|
|
)
|
|
);
|
|
|
|
DECLARE_EVENT_CLASS(
|
|
hfi1_do_send_template,
|
|
TP_PROTO(struct rvt_qp *qp, bool flag),
|
|
TP_ARGS(qp, flag),
|
|
TP_STRUCT__entry(
|
|
DD_DEV_ENTRY(dd_from_ibdev(qp->ibqp.device))
|
|
__field(u32, qpn)
|
|
__field(bool, flag)
|
|
),
|
|
TP_fast_assign(
|
|
DD_DEV_ASSIGN(dd_from_ibdev(qp->ibqp.device))
|
|
__entry->qpn = qp->ibqp.qp_num;
|
|
__entry->flag = flag;
|
|
),
|
|
TP_printk(
|
|
"[%s] qpn %x flag %d",
|
|
__get_str(dev),
|
|
__entry->qpn,
|
|
__entry->flag
|
|
)
|
|
);
|
|
|
|
DEFINE_EVENT(
|
|
hfi1_do_send_template, hfi1_rc_do_send,
|
|
TP_PROTO(struct rvt_qp *qp, bool flag),
|
|
TP_ARGS(qp, flag)
|
|
);
|
|
|
|
DEFINE_EVENT(
|
|
hfi1_do_send_template, hfi1_rc_expired_time_slice,
|
|
TP_PROTO(struct rvt_qp *qp, bool flag),
|
|
TP_ARGS(qp, flag)
|
|
);
|
|
|
|
#endif /* __HFI1_TRACE_TX_H */
|
|
|
|
#undef TRACE_INCLUDE_PATH
|
|
#undef TRACE_INCLUDE_FILE
|
|
#define TRACE_INCLUDE_PATH .
|
|
#define TRACE_INCLUDE_FILE trace_tx
|
|
#include <trace/define_trace.h>
|