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a52dc3a100
This change allows the RDMA stack to use physical resource numbers if they are passed up from the device. This is accomplished by separating the concept of the QP number from the QP handle. Previously, the two were the same, as the QP number was exposed to the guest and also used to reference a virtual QP in the device backend. With physical resource numbers exposed, the QP number given to the guest is the number assigned from the physical HCA's QP, while the QP handle is still the internal handle used to reference a virtual QP. Regardless of whether the device is exposing physical ids, the driver will still try to pick up the QP handle from the backend if possible. The MR keys exposed to the guest will also be the MR keys created by the physical HCA, instead of virtual MR keys. The distinction between handle and keys is already present for MRs so there is no need to do anything special here. A new version of the create QP response has been added to the device API to pass up the QP number and handle. The driver will also report these to userspace in the udata response if userspace supports it or not create the queuepair if not. I also had to do a refactor of the destroy qp code to reuse it if we fail to copy to userspace. Link: https://lore.kernel.org/r/20191028181444.19448-1-aditr@vmware.com Reviewed-by: Jorgen Hansen <jhansen@vmware.com> Signed-off-by: Adit Ranadive <aditr@vmware.com> Signed-off-by: Bryan Tan <bryantan@vmware.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
304 lines
7.7 KiB
C
304 lines
7.7 KiB
C
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) */
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/*
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* Copyright (c) 2012-2016 VMware, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of EITHER the GNU General Public License
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* version 2 as published by the Free Software Foundation or the BSD
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* 2-Clause License. This program is distributed in the hope that it
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* will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED
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* WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License version 2 for more details at
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* http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program available in the file COPYING in the main
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* directory of this source tree.
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*
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* The BSD 2-Clause License
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __VMW_PVRDMA_ABI_H__
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#define __VMW_PVRDMA_ABI_H__
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#include <linux/types.h>
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#define PVRDMA_UVERBS_ABI_VERSION 3 /* ABI Version. */
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#define PVRDMA_UAR_HANDLE_MASK 0x00FFFFFF /* Bottom 24 bits. */
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#define PVRDMA_UAR_QP_OFFSET 0 /* QP doorbell. */
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#define PVRDMA_UAR_QP_SEND (1 << 30) /* Send bit. */
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#define PVRDMA_UAR_QP_RECV (1 << 31) /* Recv bit. */
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#define PVRDMA_UAR_CQ_OFFSET 4 /* CQ doorbell. */
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#define PVRDMA_UAR_CQ_ARM_SOL (1 << 29) /* Arm solicited bit. */
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#define PVRDMA_UAR_CQ_ARM (1 << 30) /* Arm bit. */
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#define PVRDMA_UAR_CQ_POLL (1 << 31) /* Poll bit. */
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#define PVRDMA_UAR_SRQ_OFFSET 8 /* SRQ doorbell. */
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#define PVRDMA_UAR_SRQ_RECV (1 << 30) /* Recv bit. */
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enum pvrdma_wr_opcode {
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PVRDMA_WR_RDMA_WRITE,
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PVRDMA_WR_RDMA_WRITE_WITH_IMM,
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PVRDMA_WR_SEND,
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PVRDMA_WR_SEND_WITH_IMM,
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PVRDMA_WR_RDMA_READ,
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PVRDMA_WR_ATOMIC_CMP_AND_SWP,
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PVRDMA_WR_ATOMIC_FETCH_AND_ADD,
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PVRDMA_WR_LSO,
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PVRDMA_WR_SEND_WITH_INV,
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PVRDMA_WR_RDMA_READ_WITH_INV,
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PVRDMA_WR_LOCAL_INV,
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PVRDMA_WR_FAST_REG_MR,
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PVRDMA_WR_MASKED_ATOMIC_CMP_AND_SWP,
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PVRDMA_WR_MASKED_ATOMIC_FETCH_AND_ADD,
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PVRDMA_WR_BIND_MW,
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PVRDMA_WR_REG_SIG_MR,
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PVRDMA_WR_ERROR,
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};
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enum pvrdma_wc_status {
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PVRDMA_WC_SUCCESS,
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PVRDMA_WC_LOC_LEN_ERR,
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PVRDMA_WC_LOC_QP_OP_ERR,
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PVRDMA_WC_LOC_EEC_OP_ERR,
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PVRDMA_WC_LOC_PROT_ERR,
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PVRDMA_WC_WR_FLUSH_ERR,
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PVRDMA_WC_MW_BIND_ERR,
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PVRDMA_WC_BAD_RESP_ERR,
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PVRDMA_WC_LOC_ACCESS_ERR,
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PVRDMA_WC_REM_INV_REQ_ERR,
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PVRDMA_WC_REM_ACCESS_ERR,
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PVRDMA_WC_REM_OP_ERR,
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PVRDMA_WC_RETRY_EXC_ERR,
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PVRDMA_WC_RNR_RETRY_EXC_ERR,
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PVRDMA_WC_LOC_RDD_VIOL_ERR,
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PVRDMA_WC_REM_INV_RD_REQ_ERR,
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PVRDMA_WC_REM_ABORT_ERR,
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PVRDMA_WC_INV_EECN_ERR,
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PVRDMA_WC_INV_EEC_STATE_ERR,
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PVRDMA_WC_FATAL_ERR,
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PVRDMA_WC_RESP_TIMEOUT_ERR,
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PVRDMA_WC_GENERAL_ERR,
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};
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enum pvrdma_wc_opcode {
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PVRDMA_WC_SEND,
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PVRDMA_WC_RDMA_WRITE,
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PVRDMA_WC_RDMA_READ,
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PVRDMA_WC_COMP_SWAP,
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PVRDMA_WC_FETCH_ADD,
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PVRDMA_WC_BIND_MW,
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PVRDMA_WC_LSO,
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PVRDMA_WC_LOCAL_INV,
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PVRDMA_WC_FAST_REG_MR,
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PVRDMA_WC_MASKED_COMP_SWAP,
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PVRDMA_WC_MASKED_FETCH_ADD,
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PVRDMA_WC_RECV = 1 << 7,
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PVRDMA_WC_RECV_RDMA_WITH_IMM,
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};
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enum pvrdma_wc_flags {
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PVRDMA_WC_GRH = 1 << 0,
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PVRDMA_WC_WITH_IMM = 1 << 1,
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PVRDMA_WC_WITH_INVALIDATE = 1 << 2,
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PVRDMA_WC_IP_CSUM_OK = 1 << 3,
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PVRDMA_WC_WITH_SMAC = 1 << 4,
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PVRDMA_WC_WITH_VLAN = 1 << 5,
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PVRDMA_WC_WITH_NETWORK_HDR_TYPE = 1 << 6,
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PVRDMA_WC_FLAGS_MAX = PVRDMA_WC_WITH_NETWORK_HDR_TYPE,
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};
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struct pvrdma_alloc_ucontext_resp {
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__u32 qp_tab_size;
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__u32 reserved;
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};
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struct pvrdma_alloc_pd_resp {
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__u32 pdn;
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__u32 reserved;
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};
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struct pvrdma_create_cq {
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__aligned_u64 buf_addr;
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__u32 buf_size;
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__u32 reserved;
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};
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struct pvrdma_create_cq_resp {
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__u32 cqn;
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__u32 reserved;
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};
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struct pvrdma_resize_cq {
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__aligned_u64 buf_addr;
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__u32 buf_size;
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__u32 reserved;
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};
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struct pvrdma_create_srq {
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__aligned_u64 buf_addr;
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__u32 buf_size;
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__u32 reserved;
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};
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struct pvrdma_create_srq_resp {
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__u32 srqn;
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__u32 reserved;
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};
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struct pvrdma_create_qp {
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__aligned_u64 rbuf_addr;
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__aligned_u64 sbuf_addr;
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__u32 rbuf_size;
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__u32 sbuf_size;
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__aligned_u64 qp_addr;
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};
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struct pvrdma_create_qp_resp {
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__u32 qpn;
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__u32 qp_handle;
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};
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/* PVRDMA masked atomic compare and swap */
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struct pvrdma_ex_cmp_swap {
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__aligned_u64 swap_val;
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__aligned_u64 compare_val;
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__aligned_u64 swap_mask;
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__aligned_u64 compare_mask;
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};
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/* PVRDMA masked atomic fetch and add */
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struct pvrdma_ex_fetch_add {
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__aligned_u64 add_val;
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__aligned_u64 field_boundary;
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};
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/* PVRDMA address vector. */
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struct pvrdma_av {
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__u32 port_pd;
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__u32 sl_tclass_flowlabel;
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__u8 dgid[16];
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__u8 src_path_bits;
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__u8 gid_index;
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__u8 stat_rate;
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__u8 hop_limit;
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__u8 dmac[6];
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__u8 reserved[6];
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};
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/* PVRDMA scatter/gather entry */
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struct pvrdma_sge {
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__aligned_u64 addr;
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__u32 length;
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__u32 lkey;
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};
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/* PVRDMA receive queue work request */
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struct pvrdma_rq_wqe_hdr {
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__aligned_u64 wr_id; /* wr id */
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__u32 num_sge; /* size of s/g array */
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__u32 total_len; /* reserved */
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};
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/* Use pvrdma_sge (ib_sge) for receive queue s/g array elements. */
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/* PVRDMA send queue work request */
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struct pvrdma_sq_wqe_hdr {
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__aligned_u64 wr_id; /* wr id */
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__u32 num_sge; /* size of s/g array */
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__u32 total_len; /* reserved */
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__u32 opcode; /* operation type */
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__u32 send_flags; /* wr flags */
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union {
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__be32 imm_data;
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__u32 invalidate_rkey;
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} ex;
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__u32 reserved;
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union {
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struct {
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__aligned_u64 remote_addr;
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__u32 rkey;
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__u8 reserved[4];
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} rdma;
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struct {
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__aligned_u64 remote_addr;
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__aligned_u64 compare_add;
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__aligned_u64 swap;
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__u32 rkey;
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__u32 reserved;
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} atomic;
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struct {
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__aligned_u64 remote_addr;
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__u32 log_arg_sz;
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__u32 rkey;
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union {
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struct pvrdma_ex_cmp_swap cmp_swap;
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struct pvrdma_ex_fetch_add fetch_add;
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} wr_data;
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} masked_atomics;
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struct {
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__aligned_u64 iova_start;
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__aligned_u64 pl_pdir_dma;
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__u32 page_shift;
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__u32 page_list_len;
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__u32 length;
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__u32 access_flags;
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__u32 rkey;
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__u32 reserved;
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} fast_reg;
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struct {
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__u32 remote_qpn;
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__u32 remote_qkey;
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struct pvrdma_av av;
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} ud;
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} wr;
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};
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/* Use pvrdma_sge (ib_sge) for send queue s/g array elements. */
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/* Completion queue element. */
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struct pvrdma_cqe {
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__aligned_u64 wr_id;
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__aligned_u64 qp;
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__u32 opcode;
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__u32 status;
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__u32 byte_len;
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__be32 imm_data;
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__u32 src_qp;
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__u32 wc_flags;
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__u32 vendor_err;
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__u16 pkey_index;
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__u16 slid;
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__u8 sl;
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__u8 dlid_path_bits;
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__u8 port_num;
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__u8 smac[6];
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__u8 network_hdr_type;
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__u8 reserved2[6]; /* Pad to next power of 2 (64). */
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};
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#endif /* __VMW_PVRDMA_ABI_H__ */
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