mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 17:06:40 +07:00
12ead6b098
This driver would appear to have no internal locking at all. Signed-off-by: Jonathan Corbet <corbet@lwn.net>
852 lines
20 KiB
C
852 lines
20 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2005 Silicon Graphics, Inc. All rights reserved.
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*/
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/*
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* MOATB Core Services driver.
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*/
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/ioport.h>
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#include <linux/notifier.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/fs.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/mm.h>
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#include <linux/uio.h>
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#include <linux/mutex.h>
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#include <linux/smp_lock.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/sn/addrs.h>
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#include <asm/sn/intr.h>
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#include <asm/sn/tiocx.h>
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#include "mbcs.h"
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#define MBCS_DEBUG 0
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#if MBCS_DEBUG
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#define DBG(fmt...) printk(KERN_ALERT fmt)
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#else
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#define DBG(fmt...)
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#endif
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static int mbcs_major;
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static LIST_HEAD(soft_list);
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/*
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* file operations
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*/
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static const struct file_operations mbcs_ops = {
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.open = mbcs_open,
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.llseek = mbcs_sram_llseek,
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.read = mbcs_sram_read,
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.write = mbcs_sram_write,
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.mmap = mbcs_gscr_mmap,
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};
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struct mbcs_callback_arg {
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int minor;
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struct cx_dev *cx_dev;
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};
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static inline void mbcs_getdma_init(struct getdma *gdma)
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{
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memset(gdma, 0, sizeof(struct getdma));
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gdma->DoneIntEnable = 1;
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}
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static inline void mbcs_putdma_init(struct putdma *pdma)
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{
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memset(pdma, 0, sizeof(struct putdma));
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pdma->DoneIntEnable = 1;
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}
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static inline void mbcs_algo_init(struct algoblock *algo_soft)
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{
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memset(algo_soft, 0, sizeof(struct algoblock));
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}
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static inline void mbcs_getdma_set(void *mmr,
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uint64_t hostAddr,
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uint64_t localAddr,
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uint64_t localRamSel,
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uint64_t numPkts,
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uint64_t amoEnable,
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uint64_t intrEnable,
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uint64_t peerIO,
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uint64_t amoHostDest,
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uint64_t amoModType, uint64_t intrHostDest,
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uint64_t intrVector)
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{
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union dma_control rdma_control;
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union dma_amo_dest amo_dest;
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union intr_dest intr_dest;
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union dma_localaddr local_addr;
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union dma_hostaddr host_addr;
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rdma_control.dma_control_reg = 0;
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amo_dest.dma_amo_dest_reg = 0;
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intr_dest.intr_dest_reg = 0;
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local_addr.dma_localaddr_reg = 0;
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host_addr.dma_hostaddr_reg = 0;
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host_addr.dma_sys_addr = hostAddr;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_SYS_ADDR, host_addr.dma_hostaddr_reg);
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local_addr.dma_ram_addr = localAddr;
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local_addr.dma_ram_sel = localRamSel;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_LOC_ADDR, local_addr.dma_localaddr_reg);
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rdma_control.dma_op_length = numPkts;
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rdma_control.done_amo_en = amoEnable;
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rdma_control.done_int_en = intrEnable;
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rdma_control.pio_mem_n = peerIO;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_CTRL, rdma_control.dma_control_reg);
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amo_dest.dma_amo_sys_addr = amoHostDest;
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amo_dest.dma_amo_mod_type = amoModType;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_AMO_DEST, amo_dest.dma_amo_dest_reg);
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intr_dest.address = intrHostDest;
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intr_dest.int_vector = intrVector;
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MBCS_MMR_SET(mmr, MBCS_RD_DMA_INT_DEST, intr_dest.intr_dest_reg);
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}
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static inline void mbcs_putdma_set(void *mmr,
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uint64_t hostAddr,
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uint64_t localAddr,
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uint64_t localRamSel,
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uint64_t numPkts,
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uint64_t amoEnable,
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uint64_t intrEnable,
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uint64_t peerIO,
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uint64_t amoHostDest,
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uint64_t amoModType,
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uint64_t intrHostDest, uint64_t intrVector)
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{
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union dma_control wdma_control;
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union dma_amo_dest amo_dest;
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union intr_dest intr_dest;
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union dma_localaddr local_addr;
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union dma_hostaddr host_addr;
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wdma_control.dma_control_reg = 0;
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amo_dest.dma_amo_dest_reg = 0;
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intr_dest.intr_dest_reg = 0;
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local_addr.dma_localaddr_reg = 0;
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host_addr.dma_hostaddr_reg = 0;
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host_addr.dma_sys_addr = hostAddr;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_SYS_ADDR, host_addr.dma_hostaddr_reg);
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local_addr.dma_ram_addr = localAddr;
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local_addr.dma_ram_sel = localRamSel;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_LOC_ADDR, local_addr.dma_localaddr_reg);
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wdma_control.dma_op_length = numPkts;
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wdma_control.done_amo_en = amoEnable;
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wdma_control.done_int_en = intrEnable;
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wdma_control.pio_mem_n = peerIO;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_CTRL, wdma_control.dma_control_reg);
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amo_dest.dma_amo_sys_addr = amoHostDest;
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amo_dest.dma_amo_mod_type = amoModType;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_AMO_DEST, amo_dest.dma_amo_dest_reg);
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intr_dest.address = intrHostDest;
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intr_dest.int_vector = intrVector;
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MBCS_MMR_SET(mmr, MBCS_WR_DMA_INT_DEST, intr_dest.intr_dest_reg);
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}
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static inline void mbcs_algo_set(void *mmr,
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uint64_t amoHostDest,
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uint64_t amoModType,
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uint64_t intrHostDest,
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uint64_t intrVector, uint64_t algoStepCount)
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{
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union dma_amo_dest amo_dest;
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union intr_dest intr_dest;
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union algo_step step;
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step.algo_step_reg = 0;
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intr_dest.intr_dest_reg = 0;
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amo_dest.dma_amo_dest_reg = 0;
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amo_dest.dma_amo_sys_addr = amoHostDest;
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amo_dest.dma_amo_mod_type = amoModType;
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MBCS_MMR_SET(mmr, MBCS_ALG_AMO_DEST, amo_dest.dma_amo_dest_reg);
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intr_dest.address = intrHostDest;
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intr_dest.int_vector = intrVector;
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MBCS_MMR_SET(mmr, MBCS_ALG_INT_DEST, intr_dest.intr_dest_reg);
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step.alg_step_cnt = algoStepCount;
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MBCS_MMR_SET(mmr, MBCS_ALG_STEP, step.algo_step_reg);
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}
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static inline int mbcs_getdma_start(struct mbcs_soft *soft)
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{
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void *mmr_base;
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struct getdma *gdma;
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uint64_t numPkts;
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union cm_control cm_control;
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mmr_base = soft->mmr_base;
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gdma = &soft->getdma;
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/* check that host address got setup */
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if (!gdma->hostAddr)
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return -1;
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numPkts =
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(gdma->bytes + (MBCS_CACHELINE_SIZE - 1)) / MBCS_CACHELINE_SIZE;
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/* program engine */
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mbcs_getdma_set(mmr_base, tiocx_dma_addr(gdma->hostAddr),
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gdma->localAddr,
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(gdma->localAddr < MB2) ? 0 :
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(gdma->localAddr < MB4) ? 1 :
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(gdma->localAddr < MB6) ? 2 : 3,
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numPkts,
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gdma->DoneAmoEnable,
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gdma->DoneIntEnable,
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gdma->peerIO,
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gdma->amoHostDest,
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gdma->amoModType,
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gdma->intrHostDest, gdma->intrVector);
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/* start engine */
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cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
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cm_control.rd_dma_go = 1;
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MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
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return 0;
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}
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static inline int mbcs_putdma_start(struct mbcs_soft *soft)
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{
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void *mmr_base;
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struct putdma *pdma;
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uint64_t numPkts;
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union cm_control cm_control;
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mmr_base = soft->mmr_base;
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pdma = &soft->putdma;
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/* check that host address got setup */
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if (!pdma->hostAddr)
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return -1;
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numPkts =
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(pdma->bytes + (MBCS_CACHELINE_SIZE - 1)) / MBCS_CACHELINE_SIZE;
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/* program engine */
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mbcs_putdma_set(mmr_base, tiocx_dma_addr(pdma->hostAddr),
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pdma->localAddr,
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(pdma->localAddr < MB2) ? 0 :
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(pdma->localAddr < MB4) ? 1 :
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(pdma->localAddr < MB6) ? 2 : 3,
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numPkts,
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pdma->DoneAmoEnable,
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pdma->DoneIntEnable,
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pdma->peerIO,
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pdma->amoHostDest,
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pdma->amoModType,
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pdma->intrHostDest, pdma->intrVector);
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/* start engine */
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cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
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cm_control.wr_dma_go = 1;
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MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
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return 0;
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}
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static inline int mbcs_algo_start(struct mbcs_soft *soft)
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{
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struct algoblock *algo_soft = &soft->algo;
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void *mmr_base = soft->mmr_base;
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union cm_control cm_control;
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if (mutex_lock_interruptible(&soft->algolock))
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return -ERESTARTSYS;
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atomic_set(&soft->algo_done, 0);
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mbcs_algo_set(mmr_base,
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algo_soft->amoHostDest,
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algo_soft->amoModType,
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algo_soft->intrHostDest,
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algo_soft->intrVector, algo_soft->algoStepCount);
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/* start algorithm */
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cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
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cm_control.alg_done_int_en = 1;
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cm_control.alg_go = 1;
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MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
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mutex_unlock(&soft->algolock);
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return 0;
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}
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static inline ssize_t
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do_mbcs_sram_dmawrite(struct mbcs_soft *soft, uint64_t hostAddr,
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size_t len, loff_t * off)
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{
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int rv = 0;
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if (mutex_lock_interruptible(&soft->dmawritelock))
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return -ERESTARTSYS;
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atomic_set(&soft->dmawrite_done, 0);
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soft->putdma.hostAddr = hostAddr;
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soft->putdma.localAddr = *off;
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soft->putdma.bytes = len;
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if (mbcs_putdma_start(soft) < 0) {
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DBG(KERN_ALERT "do_mbcs_sram_dmawrite: "
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"mbcs_putdma_start failed\n");
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rv = -EAGAIN;
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goto dmawrite_exit;
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}
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if (wait_event_interruptible(soft->dmawrite_queue,
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atomic_read(&soft->dmawrite_done))) {
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rv = -ERESTARTSYS;
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goto dmawrite_exit;
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}
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rv = len;
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*off += len;
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dmawrite_exit:
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mutex_unlock(&soft->dmawritelock);
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return rv;
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}
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static inline ssize_t
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do_mbcs_sram_dmaread(struct mbcs_soft *soft, uint64_t hostAddr,
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size_t len, loff_t * off)
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{
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int rv = 0;
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if (mutex_lock_interruptible(&soft->dmareadlock))
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return -ERESTARTSYS;
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atomic_set(&soft->dmawrite_done, 0);
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soft->getdma.hostAddr = hostAddr;
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soft->getdma.localAddr = *off;
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soft->getdma.bytes = len;
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if (mbcs_getdma_start(soft) < 0) {
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DBG(KERN_ALERT "mbcs_strategy: mbcs_getdma_start failed\n");
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rv = -EAGAIN;
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goto dmaread_exit;
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}
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if (wait_event_interruptible(soft->dmaread_queue,
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atomic_read(&soft->dmaread_done))) {
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rv = -ERESTARTSYS;
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goto dmaread_exit;
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}
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rv = len;
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*off += len;
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dmaread_exit:
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mutex_unlock(&soft->dmareadlock);
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return rv;
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}
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static int mbcs_open(struct inode *ip, struct file *fp)
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{
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struct mbcs_soft *soft;
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int minor;
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lock_kernel();
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minor = iminor(ip);
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/* Nothing protects access to this list... */
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list_for_each_entry(soft, &soft_list, list) {
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if (soft->nasid == minor) {
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fp->private_data = soft->cxdev;
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unlock_kernel();
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return 0;
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}
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}
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unlock_kernel();
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return -ENODEV;
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}
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static ssize_t mbcs_sram_read(struct file * fp, char __user *buf, size_t len, loff_t * off)
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{
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struct cx_dev *cx_dev = fp->private_data;
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struct mbcs_soft *soft = cx_dev->soft;
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uint64_t hostAddr;
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int rv = 0;
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hostAddr = __get_dma_pages(GFP_KERNEL, get_order(len));
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if (hostAddr == 0)
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return -ENOMEM;
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rv = do_mbcs_sram_dmawrite(soft, hostAddr, len, off);
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if (rv < 0)
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goto exit;
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if (copy_to_user(buf, (void *)hostAddr, len))
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rv = -EFAULT;
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exit:
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free_pages(hostAddr, get_order(len));
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return rv;
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}
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static ssize_t
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mbcs_sram_write(struct file * fp, const char __user *buf, size_t len, loff_t * off)
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{
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struct cx_dev *cx_dev = fp->private_data;
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struct mbcs_soft *soft = cx_dev->soft;
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uint64_t hostAddr;
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int rv = 0;
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hostAddr = __get_dma_pages(GFP_KERNEL, get_order(len));
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if (hostAddr == 0)
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return -ENOMEM;
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if (copy_from_user((void *)hostAddr, buf, len)) {
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rv = -EFAULT;
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goto exit;
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}
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rv = do_mbcs_sram_dmaread(soft, hostAddr, len, off);
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exit:
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free_pages(hostAddr, get_order(len));
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return rv;
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}
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static loff_t mbcs_sram_llseek(struct file * filp, loff_t off, int whence)
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{
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loff_t newpos;
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switch (whence) {
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case SEEK_SET:
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newpos = off;
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break;
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case SEEK_CUR:
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newpos = filp->f_pos + off;
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break;
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case SEEK_END:
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newpos = MBCS_SRAM_SIZE + off;
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break;
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default: /* can't happen */
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return -EINVAL;
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}
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if (newpos < 0)
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return -EINVAL;
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filp->f_pos = newpos;
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return newpos;
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}
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static uint64_t mbcs_pioaddr(struct mbcs_soft *soft, uint64_t offset)
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{
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uint64_t mmr_base;
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mmr_base = (uint64_t) (soft->mmr_base + offset);
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return mmr_base;
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}
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static void mbcs_debug_pioaddr_set(struct mbcs_soft *soft)
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{
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soft->debug_addr = mbcs_pioaddr(soft, MBCS_DEBUG_START);
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}
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static void mbcs_gscr_pioaddr_set(struct mbcs_soft *soft)
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{
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soft->gscr_addr = mbcs_pioaddr(soft, MBCS_GSCR_START);
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}
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static int mbcs_gscr_mmap(struct file *fp, struct vm_area_struct *vma)
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{
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struct cx_dev *cx_dev = fp->private_data;
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struct mbcs_soft *soft = cx_dev->soft;
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if (vma->vm_pgoff != 0)
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return -EINVAL;
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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|
|
/* Remap-pfn-range will mark the range VM_IO and VM_RESERVED */
|
|
if (remap_pfn_range(vma,
|
|
vma->vm_start,
|
|
__pa(soft->gscr_addr) >> PAGE_SHIFT,
|
|
PAGE_SIZE,
|
|
vma->vm_page_prot))
|
|
return -EAGAIN;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* mbcs_completion_intr_handler - Primary completion handler.
|
|
* @irq: irq
|
|
* @arg: soft struct for device
|
|
*
|
|
*/
|
|
static irqreturn_t
|
|
mbcs_completion_intr_handler(int irq, void *arg)
|
|
{
|
|
struct mbcs_soft *soft = (struct mbcs_soft *)arg;
|
|
void *mmr_base;
|
|
union cm_status cm_status;
|
|
union cm_control cm_control;
|
|
|
|
mmr_base = soft->mmr_base;
|
|
cm_status.cm_status_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_STATUS);
|
|
|
|
if (cm_status.rd_dma_done) {
|
|
/* stop dma-read engine, clear status */
|
|
cm_control.cm_control_reg =
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
cm_control.rd_dma_clr = 1;
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL,
|
|
cm_control.cm_control_reg);
|
|
atomic_set(&soft->dmaread_done, 1);
|
|
wake_up(&soft->dmaread_queue);
|
|
}
|
|
if (cm_status.wr_dma_done) {
|
|
/* stop dma-write engine, clear status */
|
|
cm_control.cm_control_reg =
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
cm_control.wr_dma_clr = 1;
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL,
|
|
cm_control.cm_control_reg);
|
|
atomic_set(&soft->dmawrite_done, 1);
|
|
wake_up(&soft->dmawrite_queue);
|
|
}
|
|
if (cm_status.alg_done) {
|
|
/* clear status */
|
|
cm_control.cm_control_reg =
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
cm_control.alg_done_clr = 1;
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL,
|
|
cm_control.cm_control_reg);
|
|
atomic_set(&soft->algo_done, 1);
|
|
wake_up(&soft->algo_queue);
|
|
}
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
/**
|
|
* mbcs_intr_alloc - Allocate interrupts.
|
|
* @dev: device pointer
|
|
*
|
|
*/
|
|
static int mbcs_intr_alloc(struct cx_dev *dev)
|
|
{
|
|
struct sn_irq_info *sn_irq;
|
|
struct mbcs_soft *soft;
|
|
struct getdma *getdma;
|
|
struct putdma *putdma;
|
|
struct algoblock *algo;
|
|
|
|
soft = dev->soft;
|
|
getdma = &soft->getdma;
|
|
putdma = &soft->putdma;
|
|
algo = &soft->algo;
|
|
|
|
soft->get_sn_irq = NULL;
|
|
soft->put_sn_irq = NULL;
|
|
soft->algo_sn_irq = NULL;
|
|
|
|
sn_irq = tiocx_irq_alloc(dev->cx_id.nasid, TIOCX_CORELET, -1, -1, -1);
|
|
if (sn_irq == NULL)
|
|
return -EAGAIN;
|
|
soft->get_sn_irq = sn_irq;
|
|
getdma->intrHostDest = sn_irq->irq_xtalkaddr;
|
|
getdma->intrVector = sn_irq->irq_irq;
|
|
if (request_irq(sn_irq->irq_irq,
|
|
(void *)mbcs_completion_intr_handler, IRQF_SHARED,
|
|
"MBCS get intr", (void *)soft)) {
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
sn_irq = tiocx_irq_alloc(dev->cx_id.nasid, TIOCX_CORELET, -1, -1, -1);
|
|
if (sn_irq == NULL) {
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
return -EAGAIN;
|
|
}
|
|
soft->put_sn_irq = sn_irq;
|
|
putdma->intrHostDest = sn_irq->irq_xtalkaddr;
|
|
putdma->intrVector = sn_irq->irq_irq;
|
|
if (request_irq(sn_irq->irq_irq,
|
|
(void *)mbcs_completion_intr_handler, IRQF_SHARED,
|
|
"MBCS put intr", (void *)soft)) {
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
sn_irq = tiocx_irq_alloc(dev->cx_id.nasid, TIOCX_CORELET, -1, -1, -1);
|
|
if (sn_irq == NULL) {
|
|
free_irq(soft->put_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
return -EAGAIN;
|
|
}
|
|
soft->algo_sn_irq = sn_irq;
|
|
algo->intrHostDest = sn_irq->irq_xtalkaddr;
|
|
algo->intrVector = sn_irq->irq_irq;
|
|
if (request_irq(sn_irq->irq_irq,
|
|
(void *)mbcs_completion_intr_handler, IRQF_SHARED,
|
|
"MBCS algo intr", (void *)soft)) {
|
|
tiocx_irq_free(soft->algo_sn_irq);
|
|
free_irq(soft->put_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* mbcs_intr_dealloc - Remove interrupts.
|
|
* @dev: device pointer
|
|
*
|
|
*/
|
|
static void mbcs_intr_dealloc(struct cx_dev *dev)
|
|
{
|
|
struct mbcs_soft *soft;
|
|
|
|
soft = dev->soft;
|
|
|
|
free_irq(soft->get_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->get_sn_irq);
|
|
free_irq(soft->put_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->put_sn_irq);
|
|
free_irq(soft->algo_sn_irq->irq_irq, soft);
|
|
tiocx_irq_free(soft->algo_sn_irq);
|
|
}
|
|
|
|
static inline int mbcs_hw_init(struct mbcs_soft *soft)
|
|
{
|
|
void *mmr_base = soft->mmr_base;
|
|
union cm_control cm_control;
|
|
union cm_req_timeout cm_req_timeout;
|
|
uint64_t err_stat;
|
|
|
|
cm_req_timeout.cm_req_timeout_reg =
|
|
MBCS_MMR_GET(mmr_base, MBCS_CM_REQ_TOUT);
|
|
|
|
cm_req_timeout.time_out = MBCS_CM_CONTROL_REQ_TOUT_MASK;
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_REQ_TOUT,
|
|
cm_req_timeout.cm_req_timeout_reg);
|
|
|
|
mbcs_gscr_pioaddr_set(soft);
|
|
mbcs_debug_pioaddr_set(soft);
|
|
|
|
/* clear errors */
|
|
err_stat = MBCS_MMR_GET(mmr_base, MBCS_CM_ERR_STAT);
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CLR_ERR_STAT, err_stat);
|
|
MBCS_MMR_ZERO(mmr_base, MBCS_CM_ERROR_DETAIL1);
|
|
|
|
/* enable interrupts */
|
|
/* turn off 2^23 (INT_EN_PIO_REQ_ADDR_INV) */
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_ERR_INT_EN, 0x3ffffff7e00ffUL);
|
|
|
|
/* arm status regs and clear engines */
|
|
cm_control.cm_control_reg = MBCS_MMR_GET(mmr_base, MBCS_CM_CONTROL);
|
|
cm_control.rearm_stat_regs = 1;
|
|
cm_control.alg_clr = 1;
|
|
cm_control.wr_dma_clr = 1;
|
|
cm_control.rd_dma_clr = 1;
|
|
|
|
MBCS_MMR_SET(mmr_base, MBCS_CM_CONTROL, cm_control.cm_control_reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static ssize_t show_algo(struct device *dev, struct device_attribute *attr, char *buf)
|
|
{
|
|
struct cx_dev *cx_dev = to_cx_dev(dev);
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
uint64_t debug0;
|
|
|
|
/*
|
|
* By convention, the first debug register contains the
|
|
* algorithm number and revision.
|
|
*/
|
|
debug0 = *(uint64_t *) soft->debug_addr;
|
|
|
|
return sprintf(buf, "0x%lx 0x%lx\n",
|
|
(debug0 >> 32), (debug0 & 0xffffffff));
|
|
}
|
|
|
|
static ssize_t store_algo(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
|
|
{
|
|
int n;
|
|
struct cx_dev *cx_dev = to_cx_dev(dev);
|
|
struct mbcs_soft *soft = cx_dev->soft;
|
|
|
|
if (count <= 0)
|
|
return 0;
|
|
|
|
n = simple_strtoul(buf, NULL, 0);
|
|
|
|
if (n == 1) {
|
|
mbcs_algo_start(soft);
|
|
if (wait_event_interruptible(soft->algo_queue,
|
|
atomic_read(&soft->algo_done)))
|
|
return -ERESTARTSYS;
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|
|
DEVICE_ATTR(algo, 0644, show_algo, store_algo);
|
|
|
|
/**
|
|
* mbcs_probe - Initialize for device
|
|
* @dev: device pointer
|
|
* @device_id: id table pointer
|
|
*
|
|
*/
|
|
static int mbcs_probe(struct cx_dev *dev, const struct cx_device_id *id)
|
|
{
|
|
struct mbcs_soft *soft;
|
|
|
|
dev->soft = NULL;
|
|
|
|
soft = kzalloc(sizeof(struct mbcs_soft), GFP_KERNEL);
|
|
if (soft == NULL)
|
|
return -ENOMEM;
|
|
|
|
soft->nasid = dev->cx_id.nasid;
|
|
list_add(&soft->list, &soft_list);
|
|
soft->mmr_base = (void *)tiocx_swin_base(dev->cx_id.nasid);
|
|
dev->soft = soft;
|
|
soft->cxdev = dev;
|
|
|
|
init_waitqueue_head(&soft->dmawrite_queue);
|
|
init_waitqueue_head(&soft->dmaread_queue);
|
|
init_waitqueue_head(&soft->algo_queue);
|
|
|
|
mutex_init(&soft->dmawritelock);
|
|
mutex_init(&soft->dmareadlock);
|
|
mutex_init(&soft->algolock);
|
|
|
|
mbcs_getdma_init(&soft->getdma);
|
|
mbcs_putdma_init(&soft->putdma);
|
|
mbcs_algo_init(&soft->algo);
|
|
|
|
mbcs_hw_init(soft);
|
|
|
|
/* Allocate interrupts */
|
|
mbcs_intr_alloc(dev);
|
|
|
|
device_create_file(&dev->dev, &dev_attr_algo);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mbcs_remove(struct cx_dev *dev)
|
|
{
|
|
if (dev->soft) {
|
|
mbcs_intr_dealloc(dev);
|
|
kfree(dev->soft);
|
|
}
|
|
|
|
device_remove_file(&dev->dev, &dev_attr_algo);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct cx_device_id __devinitdata mbcs_id_table[] = {
|
|
{
|
|
.part_num = MBCS_PART_NUM,
|
|
.mfg_num = MBCS_MFG_NUM,
|
|
},
|
|
{
|
|
.part_num = MBCS_PART_NUM_ALG0,
|
|
.mfg_num = MBCS_MFG_NUM,
|
|
},
|
|
{0, 0}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(cx, mbcs_id_table);
|
|
|
|
static struct cx_drv mbcs_driver = {
|
|
.name = DEVICE_NAME,
|
|
.id_table = mbcs_id_table,
|
|
.probe = mbcs_probe,
|
|
.remove = mbcs_remove,
|
|
};
|
|
|
|
static void __exit mbcs_exit(void)
|
|
{
|
|
unregister_chrdev(mbcs_major, DEVICE_NAME);
|
|
cx_driver_unregister(&mbcs_driver);
|
|
}
|
|
|
|
static int __init mbcs_init(void)
|
|
{
|
|
int rv;
|
|
|
|
if (!ia64_platform_is("sn2"))
|
|
return -ENODEV;
|
|
|
|
// Put driver into chrdevs[]. Get major number.
|
|
rv = register_chrdev(mbcs_major, DEVICE_NAME, &mbcs_ops);
|
|
if (rv < 0) {
|
|
DBG(KERN_ALERT "mbcs_init: can't get major number. %d\n", rv);
|
|
return rv;
|
|
}
|
|
mbcs_major = rv;
|
|
|
|
return cx_driver_register(&mbcs_driver);
|
|
}
|
|
|
|
module_init(mbcs_init);
|
|
module_exit(mbcs_exit);
|
|
|
|
MODULE_AUTHOR("Bruce Losure <blosure@sgi.com>");
|
|
MODULE_DESCRIPTION("Driver for MOATB Core Services");
|
|
MODULE_LICENSE("GPL");
|