mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 07:46:44 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
117 lines
2.8 KiB
C
117 lines
2.8 KiB
C
/* irq-mb93091.c: MB93091 FPGA interrupt handling
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*
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* Copyright (C) 2003 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <asm/io.h>
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#include <asm/system.h>
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#include <asm/bitops.h>
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#include <asm/delay.h>
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#include <asm/irq.h>
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#include <asm/irc-regs.h>
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#include <asm/irq-routing.h>
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#define __reg16(ADDR) (*(volatile unsigned short *)(ADDR))
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#define __get_IMR() ({ __reg16(0xffc00004); })
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#define __set_IMR(M) do { __reg16(0xffc00004) = (M); wmb(); } while(0)
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#define __get_IFR() ({ __reg16(0xffc0000c); })
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#define __clr_IFR(M) do { __reg16(0xffc0000c) = ~(M); wmb(); } while(0)
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static void frv_fpga_doirq(struct irq_source *source);
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static void frv_fpga_control(struct irq_group *group, int irq, int on);
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/*****************************************************************************/
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/*
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* FPGA IRQ multiplexor
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*/
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static struct irq_source frv_fpga[4] = {
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#define __FPGA(X, M) \
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[X] = { \
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.muxname = "fpga."#X, \
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.irqmask = M, \
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.doirq = frv_fpga_doirq, \
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}
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__FPGA(0, 0x0028),
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__FPGA(1, 0x0050),
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__FPGA(2, 0x1c00),
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__FPGA(3, 0x6386),
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};
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static struct irq_group frv_fpga_irqs = {
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.first_irq = IRQ_BASE_FPGA,
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.control = frv_fpga_control,
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.sources = {
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[ 1] = &frv_fpga[3],
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[ 2] = &frv_fpga[3],
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[ 3] = &frv_fpga[0],
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[ 4] = &frv_fpga[1],
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[ 5] = &frv_fpga[0],
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[ 6] = &frv_fpga[1],
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[ 7] = &frv_fpga[3],
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[ 8] = &frv_fpga[3],
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[ 9] = &frv_fpga[3],
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[10] = &frv_fpga[2],
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[11] = &frv_fpga[2],
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[12] = &frv_fpga[2],
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[13] = &frv_fpga[3],
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[14] = &frv_fpga[3],
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},
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};
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static void frv_fpga_control(struct irq_group *group, int index, int on)
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{
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uint16_t imr = __get_IMR();
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if (on)
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imr &= ~(1 << index);
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else
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imr |= 1 << index;
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__set_IMR(imr);
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}
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static void frv_fpga_doirq(struct irq_source *source)
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{
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uint16_t mask, imr;
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imr = __get_IMR();
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mask = source->irqmask & ~imr & __get_IFR();
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if (mask) {
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__set_IMR(imr | mask);
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__clr_IFR(mask);
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distribute_irqs(&frv_fpga_irqs, mask);
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__set_IMR(imr);
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}
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}
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void __init fpga_init(void)
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{
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__set_IMR(0x7ffe);
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__clr_IFR(0x0000);
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frv_irq_route_external(&frv_fpga[0], IRQ_CPU_EXTERNAL0);
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frv_irq_route_external(&frv_fpga[1], IRQ_CPU_EXTERNAL1);
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frv_irq_route_external(&frv_fpga[2], IRQ_CPU_EXTERNAL2);
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frv_irq_route_external(&frv_fpga[3], IRQ_CPU_EXTERNAL3);
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frv_irq_set_group(&frv_fpga_irqs);
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}
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