mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-20 08:50:46 +07:00
15d2bffdde
The GICv3 documentation is extremely confusing, as it talks about the number of priorities represented by the ICH_APxRn_EL2 registers, while it should really talk about the number of preemption levels. This leads to a bug where we may access undefined ICH_APxRn_EL2 registers, since PREbits is allowed to be smaller than PRIbits. Thankfully, nobody seem to have taken this path so far... The fix is to use ICH_VTR_EL2.PREbits instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Signed-off-by: Christoffer Dall <cdall@linaro.org> |
||
---|---|---|
.. | ||
hyp | ||
vgic | ||
aarch32.c | ||
arch_timer.c | ||
arm.c | ||
mmio.c | ||
mmu.c | ||
perf.c | ||
pmu.c | ||
psci.c | ||
trace.h |