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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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d8312a3f61
- VHE optimizations - EL2 address space randomization - speculative execution mitigations ("variant 3a", aka execution past invalid privilege register access) - bugfixes and cleanups PPC: - improvements for the radix page fault handler for HV KVM on POWER9 s390: - more kvm stat counters - virtio gpu plumbing - documentation - facilities improvements x86: - support for VMware magic I/O port and pseudo-PMCs - AMD pause loop exiting - support for AMD core performance extensions - support for synchronous register access - expose nVMX capabilities to userspace - support for Hyper-V signaling via eventfd - use Enlightened VMCS when running on Hyper-V - allow userspace to disable MWAIT/HLT/PAUSE vmexits - usual roundup of optimizations and nested virtualization bugfixes Generic: - API selftest infrastructure (though the only tests are for x86 as of now) -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQEcBAABAgAGBQJay19UAAoJEL/70l94x66DGKYIAIu9PTHAEwaX0et15fPW5y2x rrtS355lSAmMrPJ1nePRQ+rProD/1B0Kizj3/9O+B9OTKKRsorRYNa4CSu9neO2k N3rdE46M1wHAPwuJPcYvh3iBVXtgbMayk1EK5aVoSXaMXEHh+PWZextkl+F+G853 kC27yDy30jj9pStwnEFSBszO9ua/URdKNKBATNx8WUP6d9U/dlfm5xv3Dc3WtKt2 UMGmog2wh0i7ecXo7hRkMK4R7OYP3ZxAexq5aa9BOPuFp+ZdzC/MVpN+jsjq2J/M Zq6RNyA2HFyQeP0E9QgFsYS2BNOPeLZnT5Jg1z4jyiD32lAZ/iC51zwm4oNKcDM= =bPlD -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "ARM: - VHE optimizations - EL2 address space randomization - speculative execution mitigations ("variant 3a", aka execution past invalid privilege register access) - bugfixes and cleanups PPC: - improvements for the radix page fault handler for HV KVM on POWER9 s390: - more kvm stat counters - virtio gpu plumbing - documentation - facilities improvements x86: - support for VMware magic I/O port and pseudo-PMCs - AMD pause loop exiting - support for AMD core performance extensions - support for synchronous register access - expose nVMX capabilities to userspace - support for Hyper-V signaling via eventfd - use Enlightened VMCS when running on Hyper-V - allow userspace to disable MWAIT/HLT/PAUSE vmexits - usual roundup of optimizations and nested virtualization bugfixes Generic: - API selftest infrastructure (though the only tests are for x86 as of now)" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (174 commits) kvm: x86: fix a prototype warning kvm: selftests: add sync_regs_test kvm: selftests: add API testing infrastructure kvm: x86: fix a compile warning KVM: X86: Add Force Emulation Prefix for "emulate the next instruction" KVM: X86: Introduce handle_ud() KVM: vmx: unify adjacent #ifdefs x86: kvm: hide the unused 'cpu' variable KVM: VMX: remove bogus WARN_ON in handle_ept_misconfig Revert "KVM: X86: Fix SMRAM accessing even if VM is shutdown" kvm: Add emulation for movups/movupd KVM: VMX: raise internal error for exception during invalid protected mode state KVM: nVMX: Optimization: Dont set KVM_REQ_EVENT when VMExit with nested_run_pending KVM: nVMX: Require immediate-exit when event reinjected to L2 and L1 event pending KVM: x86: Fix misleading comments on handling pending exceptions KVM: x86: Rename interrupt.pending to interrupt.injected KVM: VMX: No need to clear pending NMI/interrupt on inject realmode interrupt x86/kvm: use Enlightened VMCS when running on Hyper-V x86/hyper-v: detect nested features x86/hyper-v: define struct hv_enlightened_vmcs and clean field bits ...
141 lines
3.9 KiB
C
141 lines
3.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* S390 version
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*
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* Derived from "include/asm-i386/mmu_context.h"
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*/
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#ifndef __S390_MMU_CONTEXT_H
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#define __S390_MMU_CONTEXT_H
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#include <asm/pgalloc.h>
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#include <linux/uaccess.h>
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#include <linux/mm_types.h>
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#include <asm/tlbflush.h>
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#include <asm/ctl_reg.h>
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#include <asm-generic/mm_hooks.h>
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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spin_lock_init(&mm->context.lock);
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INIT_LIST_HEAD(&mm->context.pgtable_list);
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INIT_LIST_HEAD(&mm->context.gmap_list);
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cpumask_clear(&mm->context.cpu_attach_mask);
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atomic_set(&mm->context.flush_count, 0);
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mm->context.gmap_asce = 0;
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mm->context.flush_mm = 0;
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#ifdef CONFIG_PGSTE
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mm->context.alloc_pgste = page_table_allocate_pgste ||
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test_thread_flag(TIF_PGSTE) ||
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(current->mm && current->mm->context.alloc_pgste);
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mm->context.has_pgste = 0;
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mm->context.use_skey = 0;
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mm->context.uses_cmm = 0;
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#endif
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switch (mm->context.asce_limit) {
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case _REGION2_SIZE:
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/*
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* forked 3-level task, fall through to set new asce with new
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* mm->pgd
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*/
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case 0:
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/* context created by exec, set asce limit to 4TB */
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mm->context.asce_limit = STACK_TOP_MAX;
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mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
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_ASCE_USER_BITS | _ASCE_TYPE_REGION3;
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/* pgd_alloc() did not account this pud */
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mm_inc_nr_puds(mm);
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break;
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case -PAGE_SIZE:
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/* forked 5-level task, set new asce with new_mm->pgd */
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mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
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_ASCE_USER_BITS | _ASCE_TYPE_REGION1;
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break;
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case _REGION1_SIZE:
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/* forked 4-level task, set new asce with new mm->pgd */
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mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
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_ASCE_USER_BITS | _ASCE_TYPE_REGION2;
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break;
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case _REGION3_SIZE:
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/* forked 2-level compat task, set new asce with new mm->pgd */
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mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
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_ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
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/* pgd_alloc() did not account this pmd */
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mm_inc_nr_pmds(mm);
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mm_inc_nr_puds(mm);
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}
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crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
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return 0;
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}
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#define destroy_context(mm) do { } while (0)
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static inline void set_user_asce(struct mm_struct *mm)
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{
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S390_lowcore.user_asce = mm->context.asce;
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__ctl_load(S390_lowcore.user_asce, 1, 1);
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clear_cpu_flag(CIF_ASCE_PRIMARY);
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}
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static inline void clear_user_asce(void)
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{
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S390_lowcore.user_asce = S390_lowcore.kernel_asce;
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__ctl_load(S390_lowcore.kernel_asce, 1, 1);
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set_cpu_flag(CIF_ASCE_PRIMARY);
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}
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mm_segment_t enable_sacf_uaccess(void);
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void disable_sacf_uaccess(mm_segment_t old_fs);
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (prev == next)
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return;
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S390_lowcore.user_asce = next->context.asce;
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cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
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/* Clear previous user-ASCE from CR1 and CR7 */
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if (!test_cpu_flag(CIF_ASCE_PRIMARY)) {
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__ctl_load(S390_lowcore.kernel_asce, 1, 1);
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set_cpu_flag(CIF_ASCE_PRIMARY);
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}
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if (test_cpu_flag(CIF_ASCE_SECONDARY)) {
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__ctl_load(S390_lowcore.vdso_asce, 7, 7);
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clear_cpu_flag(CIF_ASCE_SECONDARY);
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}
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cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
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}
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#define finish_arch_post_lock_switch finish_arch_post_lock_switch
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static inline void finish_arch_post_lock_switch(void)
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{
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struct task_struct *tsk = current;
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struct mm_struct *mm = tsk->mm;
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if (mm) {
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preempt_disable();
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while (atomic_read(&mm->context.flush_count))
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cpu_relax();
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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__tlb_flush_mm_lazy(mm);
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preempt_enable();
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}
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set_fs(current->thread.mm_segment);
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}
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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#define deactivate_mm(tsk,mm) do { } while (0)
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static inline void activate_mm(struct mm_struct *prev,
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struct mm_struct *next)
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{
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switch_mm(prev, next, current);
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
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set_user_asce(next);
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}
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#endif /* __S390_MMU_CONTEXT_H */
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