mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-19 19:47:03 +07:00
f57df83528
Use device managed functions to simplify error handling, reduce source code size, improve readability, and reduce the likelyhood of bugs. Other improvements as listed below. The conversion was done automatically with coccinelle using the following semantic patches. The semantic patches and the scripts used to generate this commit log are available at https://github.com/groeck/coccinelle-patches - Drop assignments to otherwise unused variables - Drop empty remove function - Use devm_add_action_or_reset() for calls to clk_disable_unprepare - Replace 'goto l; ... l: return e;' with 'return e;' - Introduce local variable 'struct device *dev' and use it instead of dereferencing it repeatedly - Use devm_watchdog_register_driver() to register watchdog device - Replace shutdown function with call to watchdog_stop_on_reboot() Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
378 lines
8.4 KiB
C
378 lines
8.4 KiB
C
/*
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* Watchdog driver for Alphascale ASM9260.
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*
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* Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>
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*
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* Licensed under GPLv2 or later.
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*/
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#include <linux/bitops.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/reset.h>
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#include <linux/watchdog.h>
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#define CLOCK_FREQ 1000000
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/* Watchdog Mode register */
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#define HW_WDMOD 0x00
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/* Wake interrupt. Set by HW, can't be cleared. */
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#define BM_MOD_WDINT BIT(3)
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/* This bit set if timeout reached. Cleared by SW. */
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#define BM_MOD_WDTOF BIT(2)
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/* HW Reset on timeout */
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#define BM_MOD_WDRESET BIT(1)
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/* WD enable */
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#define BM_MOD_WDEN BIT(0)
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/*
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* Watchdog Timer Constant register
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* Minimal value is 0xff, the meaning of this value
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* depends on used clock: T = WDCLK * (0xff + 1) * 4
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*/
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#define HW_WDTC 0x04
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#define BM_WDTC_MAX(freq) (0x7fffffff / (freq))
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/* Watchdog Feed register */
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#define HW_WDFEED 0x08
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/* Watchdog Timer Value register */
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#define HW_WDTV 0x0c
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#define ASM9260_WDT_DEFAULT_TIMEOUT 30
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enum asm9260_wdt_mode {
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HW_RESET,
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SW_RESET,
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DEBUG,
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};
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struct asm9260_wdt_priv {
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struct device *dev;
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struct watchdog_device wdd;
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struct clk *clk;
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struct clk *clk_ahb;
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struct reset_control *rst;
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void __iomem *iobase;
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int irq;
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unsigned long wdt_freq;
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enum asm9260_wdt_mode mode;
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};
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static int asm9260_wdt_feed(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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iowrite32(0xaa, priv->iobase + HW_WDFEED);
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iowrite32(0x55, priv->iobase + HW_WDFEED);
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return 0;
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}
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static unsigned int asm9260_wdt_gettimeleft(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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u32 counter;
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counter = ioread32(priv->iobase + HW_WDTV);
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return counter / priv->wdt_freq;
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}
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static int asm9260_wdt_updatetimeout(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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u32 counter;
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counter = wdd->timeout * priv->wdt_freq;
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iowrite32(counter, priv->iobase + HW_WDTC);
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return 0;
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}
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static int asm9260_wdt_enable(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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u32 mode = 0;
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if (priv->mode == HW_RESET)
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mode = BM_MOD_WDRESET;
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iowrite32(BM_MOD_WDEN | mode, priv->iobase + HW_WDMOD);
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asm9260_wdt_updatetimeout(wdd);
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asm9260_wdt_feed(wdd);
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return 0;
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}
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static int asm9260_wdt_disable(struct watchdog_device *wdd)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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/* The only way to disable WD is to reset it. */
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reset_control_assert(priv->rst);
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reset_control_deassert(priv->rst);
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return 0;
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}
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static int asm9260_wdt_settimeout(struct watchdog_device *wdd, unsigned int to)
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{
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wdd->timeout = to;
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asm9260_wdt_updatetimeout(wdd);
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return 0;
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}
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static void asm9260_wdt_sys_reset(struct asm9260_wdt_priv *priv)
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{
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/* init WD if it was not started */
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iowrite32(BM_MOD_WDEN | BM_MOD_WDRESET, priv->iobase + HW_WDMOD);
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iowrite32(0xff, priv->iobase + HW_WDTC);
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/* first pass correct sequence */
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asm9260_wdt_feed(&priv->wdd);
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/*
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* Then write wrong pattern to the feed to trigger reset
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* ASAP.
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*/
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iowrite32(0xff, priv->iobase + HW_WDFEED);
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mdelay(1000);
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}
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static irqreturn_t asm9260_wdt_irq(int irq, void *devid)
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{
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struct asm9260_wdt_priv *priv = devid;
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u32 stat;
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stat = ioread32(priv->iobase + HW_WDMOD);
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if (!(stat & BM_MOD_WDINT))
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return IRQ_NONE;
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if (priv->mode == DEBUG) {
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dev_info(priv->dev, "Watchdog Timeout. Do nothing.\n");
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} else {
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dev_info(priv->dev, "Watchdog Timeout. Doing SW Reset.\n");
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asm9260_wdt_sys_reset(priv);
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}
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return IRQ_HANDLED;
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}
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static int asm9260_restart(struct watchdog_device *wdd, unsigned long action,
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void *data)
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{
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struct asm9260_wdt_priv *priv = watchdog_get_drvdata(wdd);
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asm9260_wdt_sys_reset(priv);
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return 0;
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}
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static const struct watchdog_info asm9260_wdt_ident = {
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING
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| WDIOF_MAGICCLOSE,
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.identity = "Alphascale asm9260 Watchdog",
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};
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static const struct watchdog_ops asm9260_wdt_ops = {
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.owner = THIS_MODULE,
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.start = asm9260_wdt_enable,
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.stop = asm9260_wdt_disable,
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.get_timeleft = asm9260_wdt_gettimeleft,
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.ping = asm9260_wdt_feed,
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.set_timeout = asm9260_wdt_settimeout,
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.restart = asm9260_restart,
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};
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static void asm9260_clk_disable_unprepare(void *data)
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{
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clk_disable_unprepare(data);
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}
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static int asm9260_wdt_get_dt_clks(struct asm9260_wdt_priv *priv)
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{
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int err;
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unsigned long clk;
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priv->clk = devm_clk_get(priv->dev, "mod");
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if (IS_ERR(priv->clk)) {
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dev_err(priv->dev, "Failed to get \"mod\" clk\n");
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return PTR_ERR(priv->clk);
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}
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/* configure AHB clock */
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priv->clk_ahb = devm_clk_get(priv->dev, "ahb");
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if (IS_ERR(priv->clk_ahb)) {
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dev_err(priv->dev, "Failed to get \"ahb\" clk\n");
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return PTR_ERR(priv->clk_ahb);
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}
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err = clk_prepare_enable(priv->clk_ahb);
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if (err) {
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dev_err(priv->dev, "Failed to enable ahb_clk!\n");
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return err;
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}
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err = devm_add_action_or_reset(priv->dev,
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asm9260_clk_disable_unprepare,
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priv->clk_ahb);
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if (err)
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return err;
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err = clk_set_rate(priv->clk, CLOCK_FREQ);
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if (err) {
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dev_err(priv->dev, "Failed to set rate!\n");
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return err;
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}
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err = clk_prepare_enable(priv->clk);
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if (err) {
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dev_err(priv->dev, "Failed to enable clk!\n");
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return err;
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}
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err = devm_add_action_or_reset(priv->dev,
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asm9260_clk_disable_unprepare,
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priv->clk);
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if (err)
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return err;
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/* wdt has internal divider */
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clk = clk_get_rate(priv->clk);
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if (!clk) {
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dev_err(priv->dev, "Failed, clk is 0!\n");
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return -EINVAL;
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}
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priv->wdt_freq = clk / 2;
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return 0;
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}
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static void asm9260_wdt_get_dt_mode(struct asm9260_wdt_priv *priv)
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{
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const char *tmp;
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int ret;
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/* default mode */
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priv->mode = HW_RESET;
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ret = of_property_read_string(priv->dev->of_node,
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"alphascale,mode", &tmp);
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if (ret < 0)
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return;
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if (!strcmp(tmp, "hw"))
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priv->mode = HW_RESET;
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else if (!strcmp(tmp, "sw"))
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priv->mode = SW_RESET;
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else if (!strcmp(tmp, "debug"))
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priv->mode = DEBUG;
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else
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dev_warn(priv->dev, "unknown reset-type: %s. Using default \"hw\" mode.",
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tmp);
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}
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static int asm9260_wdt_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct asm9260_wdt_priv *priv;
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struct watchdog_device *wdd;
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int ret;
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static const char * const mode_name[] = { "hw", "sw", "debug", };
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priv = devm_kzalloc(dev, sizeof(struct asm9260_wdt_priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->dev = dev;
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priv->iobase = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(priv->iobase))
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return PTR_ERR(priv->iobase);
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priv->rst = devm_reset_control_get_exclusive(dev, "wdt_rst");
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if (IS_ERR(priv->rst))
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return PTR_ERR(priv->rst);
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ret = asm9260_wdt_get_dt_clks(priv);
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if (ret)
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return ret;
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wdd = &priv->wdd;
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wdd->info = &asm9260_wdt_ident;
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wdd->ops = &asm9260_wdt_ops;
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wdd->min_timeout = 1;
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wdd->max_timeout = BM_WDTC_MAX(priv->wdt_freq);
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wdd->parent = dev;
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watchdog_set_drvdata(wdd, priv);
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/*
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* If 'timeout-sec' unspecified in devicetree, assume a 30 second
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* default, unless the max timeout is less than 30 seconds, then use
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* the max instead.
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*/
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wdd->timeout = ASM9260_WDT_DEFAULT_TIMEOUT;
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watchdog_init_timeout(wdd, 0, dev);
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asm9260_wdt_get_dt_mode(priv);
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if (priv->mode != HW_RESET)
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priv->irq = platform_get_irq(pdev, 0);
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if (priv->irq > 0) {
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/*
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* Not all supported platforms specify an interrupt for the
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* watchdog, so let's make it optional.
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*/
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ret = devm_request_irq(dev, priv->irq, asm9260_wdt_irq, 0,
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pdev->name, priv);
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if (ret < 0)
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dev_warn(dev, "failed to request IRQ\n");
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}
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watchdog_set_restart_priority(wdd, 128);
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watchdog_stop_on_reboot(wdd);
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watchdog_stop_on_unregister(wdd);
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ret = devm_watchdog_register_device(dev, wdd);
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if (ret)
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return ret;
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platform_set_drvdata(pdev, priv);
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dev_info(dev, "Watchdog enabled (timeout: %d sec, mode: %s)\n",
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wdd->timeout, mode_name[priv->mode]);
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return 0;
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}
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static const struct of_device_id asm9260_wdt_of_match[] = {
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{ .compatible = "alphascale,asm9260-wdt"},
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{},
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};
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MODULE_DEVICE_TABLE(of, asm9260_wdt_of_match);
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static struct platform_driver asm9260_wdt_driver = {
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.driver = {
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.name = "asm9260-wdt",
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.of_match_table = asm9260_wdt_of_match,
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},
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.probe = asm9260_wdt_probe,
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};
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module_platform_driver(asm9260_wdt_driver);
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MODULE_DESCRIPTION("asm9260 WatchDog Timer Driver");
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MODULE_AUTHOR("Oleksij Rempel <linux@rempel-privat.de>");
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MODULE_LICENSE("GPL");
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