mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-21 22:37:01 +07:00
ed424bb368
As hw_random core calls ->read with max > 32 or more, make it explicit. Also remove checks involving 'max' being less than 8. Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
184 lines
4.4 KiB
C
184 lines
4.4 KiB
C
/*
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* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/hw_random.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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/* Device specific register offsets */
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#define PRNG_DATA_OUT 0x0000
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#define PRNG_STATUS 0x0004
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#define PRNG_LFSR_CFG 0x0100
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#define PRNG_CONFIG 0x0104
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/* Device specific register masks and config values */
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#define PRNG_LFSR_CFG_MASK 0x0000ffff
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#define PRNG_LFSR_CFG_CLOCKS 0x0000dddd
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#define PRNG_CONFIG_HW_ENABLE BIT(1)
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#define PRNG_STATUS_DATA_AVAIL BIT(0)
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#define MAX_HW_FIFO_DEPTH 16
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#define MAX_HW_FIFO_SIZE (MAX_HW_FIFO_DEPTH * 4)
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#define WORD_SZ 4
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struct msm_rng {
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void __iomem *base;
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struct clk *clk;
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struct hwrng hwrng;
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};
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#define to_msm_rng(p) container_of(p, struct msm_rng, hwrng)
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static int msm_rng_enable(struct hwrng *hwrng, int enable)
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{
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struct msm_rng *rng = to_msm_rng(hwrng);
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u32 val;
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int ret;
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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if (enable) {
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/* Enable PRNG only if it is not already enabled */
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val = readl_relaxed(rng->base + PRNG_CONFIG);
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if (val & PRNG_CONFIG_HW_ENABLE)
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goto already_enabled;
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val = readl_relaxed(rng->base + PRNG_LFSR_CFG);
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val &= ~PRNG_LFSR_CFG_MASK;
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val |= PRNG_LFSR_CFG_CLOCKS;
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writel(val, rng->base + PRNG_LFSR_CFG);
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val = readl_relaxed(rng->base + PRNG_CONFIG);
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val |= PRNG_CONFIG_HW_ENABLE;
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writel(val, rng->base + PRNG_CONFIG);
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} else {
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val = readl_relaxed(rng->base + PRNG_CONFIG);
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val &= ~PRNG_CONFIG_HW_ENABLE;
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writel(val, rng->base + PRNG_CONFIG);
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}
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already_enabled:
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clk_disable_unprepare(rng->clk);
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return 0;
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}
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static int msm_rng_read(struct hwrng *hwrng, void *data, size_t max, bool wait)
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{
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struct msm_rng *rng = to_msm_rng(hwrng);
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size_t currsize = 0;
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u32 *retdata = data;
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size_t maxsize;
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int ret;
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u32 val;
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/* calculate max size bytes to transfer back to caller */
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maxsize = min_t(size_t, MAX_HW_FIFO_SIZE, max);
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ret = clk_prepare_enable(rng->clk);
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if (ret)
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return ret;
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/* read random data from hardware */
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do {
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val = readl_relaxed(rng->base + PRNG_STATUS);
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if (!(val & PRNG_STATUS_DATA_AVAIL))
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break;
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val = readl_relaxed(rng->base + PRNG_DATA_OUT);
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if (!val)
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break;
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*retdata++ = val;
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currsize += WORD_SZ;
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/* make sure we stay on 32bit boundary */
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if ((maxsize - currsize) < WORD_SZ)
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break;
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} while (currsize < maxsize);
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clk_disable_unprepare(rng->clk);
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return currsize;
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}
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static int msm_rng_init(struct hwrng *hwrng)
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{
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return msm_rng_enable(hwrng, 1);
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}
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static void msm_rng_cleanup(struct hwrng *hwrng)
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{
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msm_rng_enable(hwrng, 0);
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}
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static int msm_rng_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct msm_rng *rng;
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int ret;
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rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
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if (!rng)
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return -ENOMEM;
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platform_set_drvdata(pdev, rng);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rng->base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(rng->base))
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return PTR_ERR(rng->base);
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rng->clk = devm_clk_get(&pdev->dev, "core");
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if (IS_ERR(rng->clk))
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return PTR_ERR(rng->clk);
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rng->hwrng.name = KBUILD_MODNAME,
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rng->hwrng.init = msm_rng_init,
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rng->hwrng.cleanup = msm_rng_cleanup,
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rng->hwrng.read = msm_rng_read,
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ret = devm_hwrng_register(&pdev->dev, &rng->hwrng);
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if (ret) {
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dev_err(&pdev->dev, "failed to register hwrng\n");
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return ret;
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}
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return 0;
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}
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static const struct of_device_id msm_rng_of_match[] = {
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{ .compatible = "qcom,prng", },
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{}
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};
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MODULE_DEVICE_TABLE(of, msm_rng_of_match);
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static struct platform_driver msm_rng_driver = {
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.probe = msm_rng_probe,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = of_match_ptr(msm_rng_of_match),
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}
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};
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module_platform_driver(msm_rng_driver);
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MODULE_ALIAS("platform:" KBUILD_MODNAME);
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MODULE_AUTHOR("The Linux Foundation");
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MODULE_DESCRIPTION("Qualcomm MSM random number generator driver");
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MODULE_LICENSE("GPL v2");
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