Stephen Boyd 36d68f64c4 ARM: Add Krait L2 register accessor functions ... Krait CPUs have a handful of L2 cache controller registers that live behind a cp15 based indirection register. First you program the indirection register (l2cpselr) to point the L2 'window' register (l2cpdr) at what you want to read/write. Then you read/write the 'window' register to do what you want. The l2cpselr register is not banked per-cpu so we must lock around accesses to it to prevent other CPUs from re-pointing l2cpdr underneath us. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Tested-by: Craig Tatlor <ctatlor97@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>		2018-10-17 13:14:33 -07:00
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asm	ARM: Add Krait L2 register accessor functions	2018-10-17 13:14:33 -07:00
debug	ARM: shmobile: convert to SPDX identifier	2018-06-18 12:00:29 +02:00
uapi/asm	KVM: arm: Add 32bit get/set events support	2018-07-21 16:02:32 +01:00