mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-27 11:55:07 +07:00
79e57cfe00
Chelsio T6 adapters reduce number of completion to host by generating single completion for all directly placed(DDP) iSCSI pdus in a sequence, completion contains iSCSI hdr of the last pdu in a sequence. On receiving DDP completion cxgbit driver finds iSCSI cmd using iscsit_find_cmd_from_itt_or_dump(), then updates cmd->write_data_done, cmd->next_burst_len, cmd->data_sn and calls __iscsit_check_dataout_hdr() to validate iSCSI hdr. (Update __iscsit_check_dataout_hdr parameter usage - nab) Signed-off-by: Varun Prakash <varun@chelsio.com> Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com> Signed-off-by: Nicholas Bellinger <nab@linux-iscsi.org>
740 lines
18 KiB
C
740 lines
18 KiB
C
/*
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* Copyright (c) 2016 Chelsio Communications, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define DRV_NAME "cxgbit"
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#define DRV_VERSION "1.0.0-ko"
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#define pr_fmt(fmt) DRV_NAME ": " fmt
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#include "cxgbit.h"
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#ifdef CONFIG_CHELSIO_T4_DCB
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#include <net/dcbevent.h>
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#include "cxgb4_dcb.h"
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#endif
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LIST_HEAD(cdev_list_head);
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/* cdev list lock */
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DEFINE_MUTEX(cdev_list_lock);
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void _cxgbit_free_cdev(struct kref *kref)
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{
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struct cxgbit_device *cdev;
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cdev = container_of(kref, struct cxgbit_device, kref);
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cxgbi_ppm_release(cdev2ppm(cdev));
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kfree(cdev);
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}
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static void cxgbit_set_mdsl(struct cxgbit_device *cdev)
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{
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struct cxgb4_lld_info *lldi = &cdev->lldi;
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u32 mdsl;
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#define ULP2_MAX_PKT_LEN 16224
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#define ISCSI_PDU_NONPAYLOAD_LEN 312
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mdsl = min_t(u32, lldi->iscsi_iolen - ISCSI_PDU_NONPAYLOAD_LEN,
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ULP2_MAX_PKT_LEN - ISCSI_PDU_NONPAYLOAD_LEN);
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mdsl = min_t(u32, mdsl, 8192);
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mdsl = min_t(u32, mdsl, (MAX_SKB_FRAGS - 1) * PAGE_SIZE);
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cdev->mdsl = mdsl;
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}
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static void *cxgbit_uld_add(const struct cxgb4_lld_info *lldi)
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{
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struct cxgbit_device *cdev;
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if (is_t4(lldi->adapter_type))
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return ERR_PTR(-ENODEV);
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cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
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if (!cdev)
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return ERR_PTR(-ENOMEM);
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kref_init(&cdev->kref);
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cdev->lldi = *lldi;
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cxgbit_set_mdsl(cdev);
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if (cxgbit_ddp_init(cdev) < 0) {
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kfree(cdev);
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return ERR_PTR(-EINVAL);
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}
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if (!test_bit(CDEV_DDP_ENABLE, &cdev->flags))
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pr_info("cdev %s ddp init failed\n",
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pci_name(lldi->pdev));
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if (lldi->fw_vers >= 0x10d2b00)
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set_bit(CDEV_ISO_ENABLE, &cdev->flags);
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spin_lock_init(&cdev->cskq.lock);
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INIT_LIST_HEAD(&cdev->cskq.list);
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mutex_lock(&cdev_list_lock);
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list_add_tail(&cdev->list, &cdev_list_head);
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mutex_unlock(&cdev_list_lock);
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pr_info("cdev %s added for iSCSI target transport\n",
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pci_name(lldi->pdev));
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return cdev;
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}
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static void cxgbit_close_conn(struct cxgbit_device *cdev)
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{
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struct cxgbit_sock *csk;
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struct sk_buff *skb;
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bool wakeup_thread = false;
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spin_lock_bh(&cdev->cskq.lock);
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list_for_each_entry(csk, &cdev->cskq.list, list) {
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skb = alloc_skb(0, GFP_ATOMIC);
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if (!skb)
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continue;
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spin_lock_bh(&csk->rxq.lock);
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__skb_queue_tail(&csk->rxq, skb);
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if (skb_queue_len(&csk->rxq) == 1)
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wakeup_thread = true;
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spin_unlock_bh(&csk->rxq.lock);
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if (wakeup_thread) {
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wake_up(&csk->waitq);
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wakeup_thread = false;
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}
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}
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spin_unlock_bh(&cdev->cskq.lock);
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}
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static void cxgbit_detach_cdev(struct cxgbit_device *cdev)
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{
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bool free_cdev = false;
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spin_lock_bh(&cdev->cskq.lock);
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if (list_empty(&cdev->cskq.list))
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free_cdev = true;
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spin_unlock_bh(&cdev->cskq.lock);
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if (free_cdev) {
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mutex_lock(&cdev_list_lock);
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list_del(&cdev->list);
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mutex_unlock(&cdev_list_lock);
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cxgbit_put_cdev(cdev);
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} else {
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cxgbit_close_conn(cdev);
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}
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}
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static int cxgbit_uld_state_change(void *handle, enum cxgb4_state state)
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{
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struct cxgbit_device *cdev = handle;
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switch (state) {
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case CXGB4_STATE_UP:
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set_bit(CDEV_STATE_UP, &cdev->flags);
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pr_info("cdev %s state UP.\n", pci_name(cdev->lldi.pdev));
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break;
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case CXGB4_STATE_START_RECOVERY:
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clear_bit(CDEV_STATE_UP, &cdev->flags);
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cxgbit_close_conn(cdev);
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pr_info("cdev %s state RECOVERY.\n", pci_name(cdev->lldi.pdev));
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break;
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case CXGB4_STATE_DOWN:
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pr_info("cdev %s state DOWN.\n", pci_name(cdev->lldi.pdev));
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break;
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case CXGB4_STATE_DETACH:
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clear_bit(CDEV_STATE_UP, &cdev->flags);
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pr_info("cdev %s state DETACH.\n", pci_name(cdev->lldi.pdev));
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cxgbit_detach_cdev(cdev);
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break;
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default:
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pr_info("cdev %s unknown state %d.\n",
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pci_name(cdev->lldi.pdev), state);
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break;
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}
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return 0;
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}
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static void
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cxgbit_process_ddpvld(struct cxgbit_sock *csk, struct cxgbit_lro_pdu_cb *pdu_cb,
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u32 ddpvld)
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{
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if (ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_HCRC_SHIFT)) {
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pr_info("tid 0x%x, status 0x%x, hcrc bad.\n", csk->tid, ddpvld);
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pdu_cb->flags |= PDUCBF_RX_HCRC_ERR;
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}
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if (ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_DCRC_SHIFT)) {
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pr_info("tid 0x%x, status 0x%x, dcrc bad.\n", csk->tid, ddpvld);
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pdu_cb->flags |= PDUCBF_RX_DCRC_ERR;
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}
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if (ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_PAD_SHIFT))
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pr_info("tid 0x%x, status 0x%x, pad bad.\n", csk->tid, ddpvld);
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if ((ddpvld & (1 << CPL_RX_ISCSI_DDP_STATUS_DDP_SHIFT)) &&
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(!(pdu_cb->flags & PDUCBF_RX_DATA))) {
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pdu_cb->flags |= PDUCBF_RX_DATA_DDPD;
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}
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}
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static void
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cxgbit_lro_add_packet_rsp(struct sk_buff *skb, u8 op, const __be64 *rsp)
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{
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struct cxgbit_lro_cb *lro_cb = cxgbit_skb_lro_cb(skb);
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struct cxgbit_lro_pdu_cb *pdu_cb = cxgbit_skb_lro_pdu_cb(skb,
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lro_cb->pdu_idx);
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struct cpl_rx_iscsi_ddp *cpl = (struct cpl_rx_iscsi_ddp *)(rsp + 1);
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cxgbit_process_ddpvld(lro_cb->csk, pdu_cb, be32_to_cpu(cpl->ddpvld));
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pdu_cb->flags |= PDUCBF_RX_STATUS;
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pdu_cb->ddigest = ntohl(cpl->ulp_crc);
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pdu_cb->pdulen = ntohs(cpl->len);
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if (pdu_cb->flags & PDUCBF_RX_HDR)
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pdu_cb->complete = true;
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lro_cb->pdu_totallen += pdu_cb->pdulen;
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lro_cb->complete = true;
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lro_cb->pdu_idx++;
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}
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static void
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cxgbit_copy_frags(struct sk_buff *skb, const struct pkt_gl *gl,
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unsigned int offset)
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{
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u8 skb_frag_idx = skb_shinfo(skb)->nr_frags;
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u8 i;
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/* usually there's just one frag */
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__skb_fill_page_desc(skb, skb_frag_idx, gl->frags[0].page,
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gl->frags[0].offset + offset,
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gl->frags[0].size - offset);
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for (i = 1; i < gl->nfrags; i++)
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__skb_fill_page_desc(skb, skb_frag_idx + i,
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gl->frags[i].page,
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gl->frags[i].offset,
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gl->frags[i].size);
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skb_shinfo(skb)->nr_frags += gl->nfrags;
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/* get a reference to the last page, we don't own it */
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get_page(gl->frags[gl->nfrags - 1].page);
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}
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static void
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cxgbit_lro_add_packet_gl(struct sk_buff *skb, u8 op, const struct pkt_gl *gl)
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{
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struct cxgbit_lro_cb *lro_cb = cxgbit_skb_lro_cb(skb);
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struct cxgbit_lro_pdu_cb *pdu_cb = cxgbit_skb_lro_pdu_cb(skb,
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lro_cb->pdu_idx);
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u32 len, offset;
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if (op == CPL_ISCSI_HDR) {
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struct cpl_iscsi_hdr *cpl = (struct cpl_iscsi_hdr *)gl->va;
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offset = sizeof(struct cpl_iscsi_hdr);
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pdu_cb->flags |= PDUCBF_RX_HDR;
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pdu_cb->seq = ntohl(cpl->seq);
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len = ntohs(cpl->len);
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pdu_cb->hdr = gl->va + offset;
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pdu_cb->hlen = len;
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pdu_cb->hfrag_idx = skb_shinfo(skb)->nr_frags;
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if (unlikely(gl->nfrags > 1))
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cxgbit_skcb_flags(skb) = 0;
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lro_cb->complete = false;
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} else if (op == CPL_ISCSI_DATA) {
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struct cpl_iscsi_data *cpl = (struct cpl_iscsi_data *)gl->va;
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offset = sizeof(struct cpl_iscsi_data);
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pdu_cb->flags |= PDUCBF_RX_DATA;
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len = ntohs(cpl->len);
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pdu_cb->dlen = len;
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pdu_cb->doffset = lro_cb->offset;
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pdu_cb->nr_dfrags = gl->nfrags;
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pdu_cb->dfrag_idx = skb_shinfo(skb)->nr_frags;
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lro_cb->complete = false;
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} else {
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struct cpl_rx_iscsi_cmp *cpl;
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cpl = (struct cpl_rx_iscsi_cmp *)gl->va;
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offset = sizeof(struct cpl_rx_iscsi_cmp);
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pdu_cb->flags |= (PDUCBF_RX_HDR | PDUCBF_RX_STATUS);
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len = be16_to_cpu(cpl->len);
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pdu_cb->hdr = gl->va + offset;
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pdu_cb->hlen = len;
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pdu_cb->hfrag_idx = skb_shinfo(skb)->nr_frags;
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pdu_cb->ddigest = be32_to_cpu(cpl->ulp_crc);
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pdu_cb->pdulen = ntohs(cpl->len);
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if (unlikely(gl->nfrags > 1))
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cxgbit_skcb_flags(skb) = 0;
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cxgbit_process_ddpvld(lro_cb->csk, pdu_cb,
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be32_to_cpu(cpl->ddpvld));
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if (pdu_cb->flags & PDUCBF_RX_DATA_DDPD) {
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pdu_cb->flags |= PDUCBF_RX_DDP_CMP;
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pdu_cb->complete = true;
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} else if (pdu_cb->flags & PDUCBF_RX_DATA) {
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pdu_cb->complete = true;
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}
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lro_cb->pdu_totallen += pdu_cb->hlen + pdu_cb->dlen;
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lro_cb->complete = true;
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lro_cb->pdu_idx++;
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}
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cxgbit_copy_frags(skb, gl, offset);
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pdu_cb->frags += gl->nfrags;
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lro_cb->offset += len;
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skb->len += len;
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skb->data_len += len;
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skb->truesize += len;
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}
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static struct sk_buff *
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cxgbit_lro_init_skb(struct cxgbit_sock *csk, u8 op, const struct pkt_gl *gl,
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const __be64 *rsp, struct napi_struct *napi)
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{
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struct sk_buff *skb;
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struct cxgbit_lro_cb *lro_cb;
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skb = napi_alloc_skb(napi, LRO_SKB_MAX_HEADROOM);
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if (unlikely(!skb))
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return NULL;
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memset(skb->data, 0, LRO_SKB_MAX_HEADROOM);
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cxgbit_skcb_flags(skb) |= SKCBF_RX_LRO;
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lro_cb = cxgbit_skb_lro_cb(skb);
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cxgbit_get_csk(csk);
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lro_cb->csk = csk;
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return skb;
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}
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static void cxgbit_queue_lro_skb(struct cxgbit_sock *csk, struct sk_buff *skb)
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{
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bool wakeup_thread = false;
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spin_lock(&csk->rxq.lock);
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__skb_queue_tail(&csk->rxq, skb);
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if (skb_queue_len(&csk->rxq) == 1)
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wakeup_thread = true;
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spin_unlock(&csk->rxq.lock);
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if (wakeup_thread)
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wake_up(&csk->waitq);
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}
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static void cxgbit_lro_flush(struct t4_lro_mgr *lro_mgr, struct sk_buff *skb)
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{
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struct cxgbit_lro_cb *lro_cb = cxgbit_skb_lro_cb(skb);
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struct cxgbit_sock *csk = lro_cb->csk;
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csk->lro_skb = NULL;
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__skb_unlink(skb, &lro_mgr->lroq);
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cxgbit_queue_lro_skb(csk, skb);
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cxgbit_put_csk(csk);
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lro_mgr->lro_pkts++;
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lro_mgr->lro_session_cnt--;
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}
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static void cxgbit_uld_lro_flush(struct t4_lro_mgr *lro_mgr)
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{
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struct sk_buff *skb;
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while ((skb = skb_peek(&lro_mgr->lroq)))
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cxgbit_lro_flush(lro_mgr, skb);
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}
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static int
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cxgbit_lro_receive(struct cxgbit_sock *csk, u8 op, const __be64 *rsp,
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const struct pkt_gl *gl, struct t4_lro_mgr *lro_mgr,
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struct napi_struct *napi)
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{
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struct sk_buff *skb;
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struct cxgbit_lro_cb *lro_cb;
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if (!csk) {
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pr_err("%s: csk NULL, op 0x%x.\n", __func__, op);
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goto out;
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}
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if (csk->lro_skb)
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goto add_packet;
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start_lro:
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if (lro_mgr->lro_session_cnt >= MAX_LRO_SESSIONS) {
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cxgbit_uld_lro_flush(lro_mgr);
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goto start_lro;
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}
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skb = cxgbit_lro_init_skb(csk, op, gl, rsp, napi);
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if (unlikely(!skb))
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goto out;
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csk->lro_skb = skb;
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__skb_queue_tail(&lro_mgr->lroq, skb);
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lro_mgr->lro_session_cnt++;
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add_packet:
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skb = csk->lro_skb;
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lro_cb = cxgbit_skb_lro_cb(skb);
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if ((gl && (((skb_shinfo(skb)->nr_frags + gl->nfrags) >
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MAX_SKB_FRAGS) || (lro_cb->pdu_totallen >= LRO_FLUSH_LEN_MAX))) ||
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(lro_cb->pdu_idx >= MAX_SKB_FRAGS)) {
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cxgbit_lro_flush(lro_mgr, skb);
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goto start_lro;
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}
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if (gl)
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cxgbit_lro_add_packet_gl(skb, op, gl);
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else
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cxgbit_lro_add_packet_rsp(skb, op, rsp);
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lro_mgr->lro_merged++;
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return 0;
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out:
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return -1;
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}
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static int
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cxgbit_uld_lro_rx_handler(void *hndl, const __be64 *rsp,
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const struct pkt_gl *gl, struct t4_lro_mgr *lro_mgr,
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struct napi_struct *napi)
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{
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struct cxgbit_device *cdev = hndl;
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struct cxgb4_lld_info *lldi = &cdev->lldi;
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struct cpl_tx_data *rpl = NULL;
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struct cxgbit_sock *csk = NULL;
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unsigned int tid = 0;
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struct sk_buff *skb;
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unsigned int op = *(u8 *)rsp;
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bool lro_flush = true;
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switch (op) {
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case CPL_ISCSI_HDR:
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case CPL_ISCSI_DATA:
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case CPL_RX_ISCSI_CMP:
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case CPL_RX_ISCSI_DDP:
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case CPL_FW4_ACK:
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lro_flush = false;
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case CPL_ABORT_RPL_RSS:
|
|
case CPL_PASS_ESTABLISH:
|
|
case CPL_PEER_CLOSE:
|
|
case CPL_CLOSE_CON_RPL:
|
|
case CPL_ABORT_REQ_RSS:
|
|
case CPL_SET_TCB_RPL:
|
|
case CPL_RX_DATA:
|
|
rpl = gl ? (struct cpl_tx_data *)gl->va :
|
|
(struct cpl_tx_data *)(rsp + 1);
|
|
tid = GET_TID(rpl);
|
|
csk = lookup_tid(lldi->tids, tid);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
if (csk && csk->lro_skb && lro_flush)
|
|
cxgbit_lro_flush(lro_mgr, csk->lro_skb);
|
|
|
|
if (!gl) {
|
|
unsigned int len;
|
|
|
|
if (op == CPL_RX_ISCSI_DDP) {
|
|
if (!cxgbit_lro_receive(csk, op, rsp, NULL, lro_mgr,
|
|
napi))
|
|
return 0;
|
|
}
|
|
|
|
len = 64 - sizeof(struct rsp_ctrl) - 8;
|
|
skb = napi_alloc_skb(napi, len);
|
|
if (!skb)
|
|
goto nomem;
|
|
__skb_put(skb, len);
|
|
skb_copy_to_linear_data(skb, &rsp[1], len);
|
|
} else {
|
|
if (unlikely(op != *(u8 *)gl->va)) {
|
|
pr_info("? FL 0x%p,RSS%#llx,FL %#llx,len %u.\n",
|
|
gl->va, be64_to_cpu(*rsp),
|
|
get_unaligned_be64(gl->va),
|
|
gl->tot_len);
|
|
return 0;
|
|
}
|
|
|
|
if ((op == CPL_ISCSI_HDR) || (op == CPL_ISCSI_DATA) ||
|
|
(op == CPL_RX_ISCSI_CMP)) {
|
|
if (!cxgbit_lro_receive(csk, op, rsp, gl, lro_mgr,
|
|
napi))
|
|
return 0;
|
|
}
|
|
|
|
#define RX_PULL_LEN 128
|
|
skb = cxgb4_pktgl_to_skb(gl, RX_PULL_LEN, RX_PULL_LEN);
|
|
if (unlikely(!skb))
|
|
goto nomem;
|
|
}
|
|
|
|
rpl = (struct cpl_tx_data *)skb->data;
|
|
op = rpl->ot.opcode;
|
|
cxgbit_skcb_rx_opcode(skb) = op;
|
|
|
|
pr_debug("cdev %p, opcode 0x%x(0x%x,0x%x), skb %p.\n",
|
|
cdev, op, rpl->ot.opcode_tid,
|
|
ntohl(rpl->ot.opcode_tid), skb);
|
|
|
|
if (op < NUM_CPL_CMDS && cxgbit_cplhandlers[op]) {
|
|
cxgbit_cplhandlers[op](cdev, skb);
|
|
} else {
|
|
pr_err("No handler for opcode 0x%x.\n", op);
|
|
__kfree_skb(skb);
|
|
}
|
|
return 0;
|
|
nomem:
|
|
pr_err("%s OOM bailing out.\n", __func__);
|
|
return 1;
|
|
}
|
|
|
|
#ifdef CONFIG_CHELSIO_T4_DCB
|
|
struct cxgbit_dcb_work {
|
|
struct dcb_app_type dcb_app;
|
|
struct work_struct work;
|
|
};
|
|
|
|
static void
|
|
cxgbit_update_dcb_priority(struct cxgbit_device *cdev, u8 port_id,
|
|
u8 dcb_priority, u16 port_num)
|
|
{
|
|
struct cxgbit_sock *csk;
|
|
struct sk_buff *skb;
|
|
u16 local_port;
|
|
bool wakeup_thread = false;
|
|
|
|
spin_lock_bh(&cdev->cskq.lock);
|
|
list_for_each_entry(csk, &cdev->cskq.list, list) {
|
|
if (csk->port_id != port_id)
|
|
continue;
|
|
|
|
if (csk->com.local_addr.ss_family == AF_INET6) {
|
|
struct sockaddr_in6 *sock_in6;
|
|
|
|
sock_in6 = (struct sockaddr_in6 *)&csk->com.local_addr;
|
|
local_port = ntohs(sock_in6->sin6_port);
|
|
} else {
|
|
struct sockaddr_in *sock_in;
|
|
|
|
sock_in = (struct sockaddr_in *)&csk->com.local_addr;
|
|
local_port = ntohs(sock_in->sin_port);
|
|
}
|
|
|
|
if (local_port != port_num)
|
|
continue;
|
|
|
|
if (csk->dcb_priority == dcb_priority)
|
|
continue;
|
|
|
|
skb = alloc_skb(0, GFP_ATOMIC);
|
|
if (!skb)
|
|
continue;
|
|
|
|
spin_lock(&csk->rxq.lock);
|
|
__skb_queue_tail(&csk->rxq, skb);
|
|
if (skb_queue_len(&csk->rxq) == 1)
|
|
wakeup_thread = true;
|
|
spin_unlock(&csk->rxq.lock);
|
|
|
|
if (wakeup_thread) {
|
|
wake_up(&csk->waitq);
|
|
wakeup_thread = false;
|
|
}
|
|
}
|
|
spin_unlock_bh(&cdev->cskq.lock);
|
|
}
|
|
|
|
static void cxgbit_dcb_workfn(struct work_struct *work)
|
|
{
|
|
struct cxgbit_dcb_work *dcb_work;
|
|
struct net_device *ndev;
|
|
struct cxgbit_device *cdev = NULL;
|
|
struct dcb_app_type *iscsi_app;
|
|
u8 priority, port_id = 0xff;
|
|
|
|
dcb_work = container_of(work, struct cxgbit_dcb_work, work);
|
|
iscsi_app = &dcb_work->dcb_app;
|
|
|
|
if (iscsi_app->dcbx & DCB_CAP_DCBX_VER_IEEE) {
|
|
if (iscsi_app->app.selector != IEEE_8021QAZ_APP_SEL_ANY)
|
|
goto out;
|
|
|
|
priority = iscsi_app->app.priority;
|
|
|
|
} else if (iscsi_app->dcbx & DCB_CAP_DCBX_VER_CEE) {
|
|
if (iscsi_app->app.selector != DCB_APP_IDTYPE_PORTNUM)
|
|
goto out;
|
|
|
|
if (!iscsi_app->app.priority)
|
|
goto out;
|
|
|
|
priority = ffs(iscsi_app->app.priority) - 1;
|
|
} else {
|
|
goto out;
|
|
}
|
|
|
|
pr_debug("priority for ifid %d is %u\n",
|
|
iscsi_app->ifindex, priority);
|
|
|
|
ndev = dev_get_by_index(&init_net, iscsi_app->ifindex);
|
|
|
|
if (!ndev)
|
|
goto out;
|
|
|
|
mutex_lock(&cdev_list_lock);
|
|
cdev = cxgbit_find_device(ndev, &port_id);
|
|
|
|
dev_put(ndev);
|
|
|
|
if (!cdev) {
|
|
mutex_unlock(&cdev_list_lock);
|
|
goto out;
|
|
}
|
|
|
|
cxgbit_update_dcb_priority(cdev, port_id, priority,
|
|
iscsi_app->app.protocol);
|
|
mutex_unlock(&cdev_list_lock);
|
|
out:
|
|
kfree(dcb_work);
|
|
}
|
|
|
|
static int
|
|
cxgbit_dcbevent_notify(struct notifier_block *nb, unsigned long action,
|
|
void *data)
|
|
{
|
|
struct cxgbit_dcb_work *dcb_work;
|
|
struct dcb_app_type *dcb_app = data;
|
|
|
|
dcb_work = kzalloc(sizeof(*dcb_work), GFP_ATOMIC);
|
|
if (!dcb_work)
|
|
return NOTIFY_DONE;
|
|
|
|
dcb_work->dcb_app = *dcb_app;
|
|
INIT_WORK(&dcb_work->work, cxgbit_dcb_workfn);
|
|
schedule_work(&dcb_work->work);
|
|
return NOTIFY_OK;
|
|
}
|
|
#endif
|
|
|
|
static enum target_prot_op cxgbit_get_sup_prot_ops(struct iscsi_conn *conn)
|
|
{
|
|
return TARGET_PROT_NORMAL;
|
|
}
|
|
|
|
static struct iscsit_transport cxgbit_transport = {
|
|
.name = DRV_NAME,
|
|
.transport_type = ISCSI_CXGBIT,
|
|
.rdma_shutdown = false,
|
|
.priv_size = sizeof(struct cxgbit_cmd),
|
|
.owner = THIS_MODULE,
|
|
.iscsit_setup_np = cxgbit_setup_np,
|
|
.iscsit_accept_np = cxgbit_accept_np,
|
|
.iscsit_free_np = cxgbit_free_np,
|
|
.iscsit_free_conn = cxgbit_free_conn,
|
|
.iscsit_get_login_rx = cxgbit_get_login_rx,
|
|
.iscsit_put_login_tx = cxgbit_put_login_tx,
|
|
.iscsit_immediate_queue = iscsit_immediate_queue,
|
|
.iscsit_response_queue = iscsit_response_queue,
|
|
.iscsit_get_dataout = iscsit_build_r2ts_for_cmd,
|
|
.iscsit_queue_data_in = iscsit_queue_rsp,
|
|
.iscsit_queue_status = iscsit_queue_rsp,
|
|
.iscsit_xmit_pdu = cxgbit_xmit_pdu,
|
|
.iscsit_get_r2t_ttt = cxgbit_get_r2t_ttt,
|
|
.iscsit_get_rx_pdu = cxgbit_get_rx_pdu,
|
|
.iscsit_validate_params = cxgbit_validate_params,
|
|
.iscsit_release_cmd = cxgbit_release_cmd,
|
|
.iscsit_aborted_task = iscsit_aborted_task,
|
|
.iscsit_get_sup_prot_ops = cxgbit_get_sup_prot_ops,
|
|
};
|
|
|
|
static struct cxgb4_uld_info cxgbit_uld_info = {
|
|
.name = DRV_NAME,
|
|
.nrxq = MAX_ULD_QSETS,
|
|
.ntxq = MAX_ULD_QSETS,
|
|
.rxq_size = 1024,
|
|
.lro = true,
|
|
.add = cxgbit_uld_add,
|
|
.state_change = cxgbit_uld_state_change,
|
|
.lro_rx_handler = cxgbit_uld_lro_rx_handler,
|
|
.lro_flush = cxgbit_uld_lro_flush,
|
|
};
|
|
|
|
#ifdef CONFIG_CHELSIO_T4_DCB
|
|
static struct notifier_block cxgbit_dcbevent_nb = {
|
|
.notifier_call = cxgbit_dcbevent_notify,
|
|
};
|
|
#endif
|
|
|
|
static int __init cxgbit_init(void)
|
|
{
|
|
cxgb4_register_uld(CXGB4_ULD_ISCSIT, &cxgbit_uld_info);
|
|
iscsit_register_transport(&cxgbit_transport);
|
|
|
|
#ifdef CONFIG_CHELSIO_T4_DCB
|
|
pr_info("%s dcb enabled.\n", DRV_NAME);
|
|
register_dcbevent_notifier(&cxgbit_dcbevent_nb);
|
|
#endif
|
|
BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, cb) <
|
|
sizeof(union cxgbit_skb_cb));
|
|
return 0;
|
|
}
|
|
|
|
static void __exit cxgbit_exit(void)
|
|
{
|
|
struct cxgbit_device *cdev, *tmp;
|
|
|
|
#ifdef CONFIG_CHELSIO_T4_DCB
|
|
unregister_dcbevent_notifier(&cxgbit_dcbevent_nb);
|
|
#endif
|
|
mutex_lock(&cdev_list_lock);
|
|
list_for_each_entry_safe(cdev, tmp, &cdev_list_head, list) {
|
|
list_del(&cdev->list);
|
|
cxgbit_put_cdev(cdev);
|
|
}
|
|
mutex_unlock(&cdev_list_lock);
|
|
iscsit_unregister_transport(&cxgbit_transport);
|
|
cxgb4_unregister_uld(CXGB4_ULD_ISCSIT);
|
|
}
|
|
|
|
module_init(cxgbit_init);
|
|
module_exit(cxgbit_exit);
|
|
|
|
MODULE_DESCRIPTION("Chelsio iSCSI target offload driver");
|
|
MODULE_AUTHOR("Chelsio Communications");
|
|
MODULE_VERSION(DRV_VERSION);
|
|
MODULE_LICENSE("GPL");
|