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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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6c081ff6fd
We intended to test "usb2->phy" here instead of "dev".
Fixes: d3feb40673 ('phy: bcm-ns-usb2: new driver for USB 2.0 PHY on Northstar')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
138 lines
3.5 KiB
C
138 lines
3.5 KiB
C
/*
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* Broadcom Northstar USB 2.0 PHY Driver
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*
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* Copyright (C) 2016 Rafał Miłecki <zajec5@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/bcma/bcma.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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struct bcm_ns_usb2 {
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struct device *dev;
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struct clk *ref_clk;
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struct phy *phy;
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void __iomem *dmu;
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};
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static int bcm_ns_usb2_phy_init(struct phy *phy)
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{
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struct bcm_ns_usb2 *usb2 = phy_get_drvdata(phy);
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struct device *dev = usb2->dev;
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void __iomem *dmu = usb2->dmu;
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u32 ref_clk_rate, usb2ctl, usb_pll_ndiv, usb_pll_pdiv;
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int err = 0;
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err = clk_prepare_enable(usb2->ref_clk);
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if (err < 0) {
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dev_err(dev, "Failed to prepare ref clock: %d\n", err);
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goto err_out;
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}
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ref_clk_rate = clk_get_rate(usb2->ref_clk);
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if (!ref_clk_rate) {
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dev_err(dev, "Failed to get ref clock rate\n");
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err = -EINVAL;
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goto err_clk_off;
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}
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usb2ctl = readl(dmu + BCMA_DMU_CRU_USB2_CONTROL);
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if (usb2ctl & BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK) {
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usb_pll_pdiv = usb2ctl;
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usb_pll_pdiv &= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_MASK;
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usb_pll_pdiv >>= BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_PDIV_SHIFT;
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} else {
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usb_pll_pdiv = 1 << 3;
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}
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/* Calculate ndiv based on a solid 1920 MHz that is for USB2 PHY */
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usb_pll_ndiv = (1920000000 * usb_pll_pdiv) / ref_clk_rate;
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/* Unlock DMU PLL settings with some magic value */
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writel(0x0000ea68, dmu + BCMA_DMU_CRU_CLKSET_KEY);
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/* Write USB 2.0 PLL control setting */
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usb2ctl &= ~BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_MASK;
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usb2ctl |= usb_pll_ndiv << BCMA_DMU_CRU_USB2_CONTROL_USB_PLL_NDIV_SHIFT;
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writel(usb2ctl, dmu + BCMA_DMU_CRU_USB2_CONTROL);
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/* Lock DMU PLL settings */
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writel(0x00000000, dmu + BCMA_DMU_CRU_CLKSET_KEY);
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err_clk_off:
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clk_disable_unprepare(usb2->ref_clk);
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err_out:
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return err;
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}
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static const struct phy_ops ops = {
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.init = bcm_ns_usb2_phy_init,
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.owner = THIS_MODULE,
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};
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static int bcm_ns_usb2_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct bcm_ns_usb2 *usb2;
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struct resource *res;
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struct phy_provider *phy_provider;
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usb2 = devm_kzalloc(&pdev->dev, sizeof(*usb2), GFP_KERNEL);
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if (!usb2)
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return -ENOMEM;
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usb2->dev = dev;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmu");
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usb2->dmu = devm_ioremap_resource(dev, res);
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if (IS_ERR(usb2->dmu)) {
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dev_err(dev, "Failed to map DMU regs\n");
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return PTR_ERR(usb2->dmu);
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}
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usb2->ref_clk = devm_clk_get(dev, "phy-ref-clk");
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if (IS_ERR(usb2->ref_clk)) {
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dev_err(dev, "Clock not defined\n");
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return PTR_ERR(usb2->ref_clk);
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}
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usb2->phy = devm_phy_create(dev, NULL, &ops);
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if (IS_ERR(usb2->phy))
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return PTR_ERR(usb2->phy);
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phy_set_drvdata(usb2->phy, usb2);
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platform_set_drvdata(pdev, usb2);
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static const struct of_device_id bcm_ns_usb2_id_table[] = {
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{ .compatible = "brcm,ns-usb2-phy", },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm_ns_usb2_id_table);
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static struct platform_driver bcm_ns_usb2_driver = {
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.probe = bcm_ns_usb2_probe,
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.driver = {
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.name = "bcm_ns_usb2",
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.of_match_table = bcm_ns_usb2_id_table,
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},
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};
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module_platform_driver(bcm_ns_usb2_driver);
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MODULE_LICENSE("GPL v2");
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