linux_dsm_epyc7002/arch/arm/mach-at91/Kconfig
Alexandre Belloni d2e4679055 ARM: at91: pm: use the mmio-sram pool to access SRAM
Now that the SRAM is part of a genpool, use it to allocate memory to use for the
slowclock implementation.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-01-16 18:07:24 +01:00

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if ARCH_AT91
config HAVE_AT91_UTMI
bool
config HAVE_AT91_USB_CLK
bool
config HAVE_AT91_DBGU0
bool
config HAVE_AT91_DBGU1
bool
config HAVE_AT91_DBGU2
bool
config COMMON_CLK_AT91
bool
select COMMON_CLK
config HAVE_AT91_SMD
bool
config HAVE_AT91_H32MX
bool
config SOC_AT91SAM9
bool
select ATMEL_AIC_IRQ
select COMMON_CLK_AT91
select CPU_ARM926T
select GENERIC_CLOCKEVENTS
select MEMORY
select ATMEL_SDRAMC
config SOC_SAMA5
bool
select ATMEL_AIC5_IRQ
select COMMON_CLK_AT91
select CPU_V7
select GENERIC_CLOCKEVENTS
select MEMORY
select ATMEL_SDRAMC
select PHYLIB if NETDEVICES
menu "Atmel AT91 System-on-Chip"
choice
prompt "Core type"
config SOC_SAM_V4_V5
bool "ARM9 AT91SAM9/AT91RM9200"
help
Select this if you are using one of Atmel's AT91SAM9 or
AT91RM9200 SoC.
config SOC_SAM_V7
bool "Cortex A5"
help
Select this if you are using one of Atmel's SAMA5D3 SoC.
endchoice
comment "Atmel AT91 Processor"
if SOC_SAM_V7
config SOC_SAMA5D3
bool "SAMA5D3 family"
select SOC_SAMA5
select HAVE_FB_ATMEL
select HAVE_AT91_DBGU1
select HAVE_AT91_UTMI
select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's SAMA5D3 family SoC.
This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
config SOC_SAMA5D4
bool "SAMA5D4 family"
select SOC_SAMA5
select HAVE_AT91_DBGU2
select CLKSRC_MMIO
select CACHE_L2X0
select CACHE_PL310
select HAVE_FB_ATMEL
select HAVE_AT91_UTMI
select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
select HAVE_AT91_H32MX
help
Select this if you are using one of Atmel's SAMA5D4 family SoC.
endif
if SOC_SAM_V4_V5
config SOC_AT91RM9200
bool "AT91RM9200"
select ATMEL_AIC_IRQ
select COMMON_CLK_AT91
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_DBGU0
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9260
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
select HAVE_AT91_DBGU0
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
or AT91SAM9G20 SoC.
config SOC_AT91SAM9261
bool "AT91SAM9261 or AT91SAM9G10"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
config SOC_AT91SAM9263
bool "AT91SAM9263"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
config SOC_AT91SAM9RL
bool "AT91SAM9RL"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
config SOC_AT91SAM9G45
bool "AT91SAM9G45 or AT91SAM9M10 families"
select HAVE_AT91_DBGU1
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
config SOC_AT91SAM9X5
bool "AT91SAM9x5 family"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_UTMI
select HAVE_AT91_SMD
select HAVE_AT91_USB_CLK
help
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
This means that your SAM9 name finishes with a '5' (except if it is
AT91SAM9G45!).
This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
and AT91SAM9X35.
config SOC_AT91SAM9N12
bool "AT91SAM9N12 family"
select HAVE_AT91_DBGU0
select HAVE_FB_ATMEL
select SOC_AT91SAM9
select HAVE_AT91_USB_CLK
help
Select this if you are using Atmel's AT91SAM9N12 SoC.
# ----------------------------------------------------------
endif # SOC_SAM_V4_V5
comment "AT91 Feature Selections"
config AT91_SLOW_CLOCK
bool "Suspend-to-RAM disables main oscillator"
select SRAM
depends on SUSPEND
help
Select this if you want Suspend-to-RAM to save the most power
possible (without powering off the CPU) by disabling the PLLs
and main oscillator so that only the 32 KiHz clock is available.
When only that slow-clock is available, some peripherals lose
functionality. Many can't issue wakeup events unless faster
clocks are available. Some lose their operating state and
need to be completely re-initialized.
config AT91_TIMER_HZ
int "Kernel HZ (jiffies per second)"
range 32 1024
depends on ARCH_AT91
default "128" if SOC_AT91RM9200
default "100"
help
On AT91rm9200 chips where you're using a system clock derived
from the 32768 Hz hardware clock, this tick rate should divide
it exactly: use a power-of-two value, such as 128 or 256, to
reduce timing errors caused by rounding.
On AT91sam926x chips, or otherwise when using a higher precision
system clock (of at least several MHz), rounding is less of a
problem so it can be safer to use a decimal values like 100.
endmenu
endif