mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-15 16:36:42 +07:00
0d1e8b8d2b
ARM:
- Improved guest IPA space support (32 to 52 bits)
- RAS event delivery for 32bit
- PMU fixes
- Guest entry hardening
- Various cleanups
- Port of dirty_log_test selftest
PPC:
- Nested HV KVM support for radix guests on POWER9. The performance is
much better than with PR KVM. Migration and arbitrary level of
nesting is supported.
- Disable nested HV-KVM on early POWER9 chips that need a particular hardware
bug workaround
- One VM per core mode to prevent potential data leaks
- PCI pass-through optimization
- merge ppc-kvm topic branch and kvm-ppc-fixes to get a better base
s390:
- Initial version of AP crypto virtualization via vfio-mdev
- Improvement for vfio-ap
- Set the host program identifier
- Optimize page table locking
x86:
- Enable nested virtualization by default
- Implement Hyper-V IPI hypercalls
- Improve #PF and #DB handling
- Allow guests to use Enlightened VMCS
- Add migration selftests for VMCS and Enlightened VMCS
- Allow coalesced PIO accesses
- Add an option to perform nested VMCS host state consistency check
through hardware
- Automatic tuning of lapic_timer_advance_ns
- Many fixes, minor improvements, and cleanups
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Merge tag 'kvm-4.20-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM updates from Radim Krčmář:
"ARM:
- Improved guest IPA space support (32 to 52 bits)
- RAS event delivery for 32bit
- PMU fixes
- Guest entry hardening
- Various cleanups
- Port of dirty_log_test selftest
PPC:
- Nested HV KVM support for radix guests on POWER9. The performance
is much better than with PR KVM. Migration and arbitrary level of
nesting is supported.
- Disable nested HV-KVM on early POWER9 chips that need a particular
hardware bug workaround
- One VM per core mode to prevent potential data leaks
- PCI pass-through optimization
- merge ppc-kvm topic branch and kvm-ppc-fixes to get a better base
s390:
- Initial version of AP crypto virtualization via vfio-mdev
- Improvement for vfio-ap
- Set the host program identifier
- Optimize page table locking
x86:
- Enable nested virtualization by default
- Implement Hyper-V IPI hypercalls
- Improve #PF and #DB handling
- Allow guests to use Enlightened VMCS
- Add migration selftests for VMCS and Enlightened VMCS
- Allow coalesced PIO accesses
- Add an option to perform nested VMCS host state consistency check
through hardware
- Automatic tuning of lapic_timer_advance_ns
- Many fixes, minor improvements, and cleanups"
* tag 'kvm-4.20-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (204 commits)
KVM/nVMX: Do not validate that posted_intr_desc_addr is page aligned
Revert "kvm: x86: optimize dr6 restore"
KVM: PPC: Optimize clearing TCEs for sparse tables
x86/kvm/nVMX: tweak shadow fields
selftests/kvm: add missing executables to .gitignore
KVM: arm64: Safety check PSTATE when entering guest and handle IL
KVM: PPC: Book3S HV: Don't use streamlined entry path on early POWER9 chips
arm/arm64: KVM: Enable 32 bits kvm vcpu events support
arm/arm64: KVM: Rename function kvm_arch_dev_ioctl_check_extension()
KVM: arm64: Fix caching of host MDCR_EL2 value
KVM: VMX: enable nested virtualization by default
KVM/x86: Use 32bit xor to clear registers in svm.c
kvm: x86: Introduce KVM_CAP_EXCEPTION_PAYLOAD
kvm: vmx: Defer setting of DR6 until #DB delivery
kvm: x86: Defer setting of CR2 until #PF delivery
kvm: x86: Add payload operands to kvm_multiple_exception
kvm: x86: Add exception payload fields to kvm_vcpu_events
kvm: x86: Add has_payload and payload to kvm_queued_exception
KVM: Documentation: Fix omission in struct kvm_vcpu_events
KVM: selftests: add Enlightened VMCS test
...
130 lines
2.7 KiB
C
130 lines
2.7 KiB
C
/* CPU virtualization extensions handling
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*
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* This should carry the code for handling CPU virtualization extensions
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* that needs to live in the kernel core.
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*
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* Author: Eduardo Habkost <ehabkost@redhat.com>
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*
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* Copyright (C) 2008, Red Hat Inc.
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*
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* Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*/
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#ifndef _ASM_X86_VIRTEX_H
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#define _ASM_X86_VIRTEX_H
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#include <asm/processor.h>
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#include <asm/vmx.h>
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#include <asm/svm.h>
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#include <asm/tlbflush.h>
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/*
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* VMX functions:
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*/
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static inline int cpu_has_vmx(void)
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{
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unsigned long ecx = cpuid_ecx(1);
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return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
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}
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/** Disable VMX on the current CPU
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*
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* vmxoff causes a undefined-opcode exception if vmxon was not run
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* on the CPU previously. Only call this function if you know VMX
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* is enabled.
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*/
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static inline void cpu_vmxoff(void)
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{
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asm volatile ("vmxoff");
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cr4_clear_bits(X86_CR4_VMXE);
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}
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static inline int cpu_vmx_enabled(void)
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{
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return __read_cr4() & X86_CR4_VMXE;
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}
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/** Disable VMX if it is enabled on the current CPU
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*
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* You shouldn't call this if cpu_has_vmx() returns 0.
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*/
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static inline void __cpu_emergency_vmxoff(void)
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{
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if (cpu_vmx_enabled())
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cpu_vmxoff();
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}
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/** Disable VMX if it is supported and enabled on the current CPU
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*/
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static inline void cpu_emergency_vmxoff(void)
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{
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if (cpu_has_vmx())
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__cpu_emergency_vmxoff();
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}
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/*
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* SVM functions:
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*/
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/** Check if the CPU has SVM support
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*
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* You can use the 'msg' arg to get a message describing the problem,
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* if the function returns zero. Simply pass NULL if you are not interested
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* on the messages; gcc should take care of not generating code for
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* the messages on this case.
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*/
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static inline int cpu_has_svm(const char **msg)
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{
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if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
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boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) {
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if (msg)
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*msg = "not amd or hygon";
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return 0;
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}
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if (boot_cpu_data.extended_cpuid_level < SVM_CPUID_FUNC) {
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if (msg)
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*msg = "can't execute cpuid_8000000a";
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return 0;
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}
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if (!boot_cpu_has(X86_FEATURE_SVM)) {
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if (msg)
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*msg = "svm not available";
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return 0;
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}
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return 1;
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}
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/** Disable SVM on the current CPU
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*
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* You should call this only if cpu_has_svm() returned true.
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*/
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static inline void cpu_svm_disable(void)
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{
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uint64_t efer;
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wrmsrl(MSR_VM_HSAVE_PA, 0);
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rdmsrl(MSR_EFER, efer);
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wrmsrl(MSR_EFER, efer & ~EFER_SVME);
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}
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/** Makes sure SVM is disabled, if it is supported on the CPU
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*/
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static inline void cpu_emergency_svm_disable(void)
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{
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if (cpu_has_svm(NULL))
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cpu_svm_disable();
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}
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#endif /* _ASM_X86_VIRTEX_H */
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