mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-30 12:16:45 +07:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
212 lines
7.8 KiB
C
212 lines
7.8 KiB
C
/*
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* ATI PCI IDs from XFree86, kept here to make sync'ing with
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* XFree much simpler. Currently, this list is only used by
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* radeonfb
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*/
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#define PCI_CHIP_RV380_3150 0x3150
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#define PCI_CHIP_RV380_3151 0x3151
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#define PCI_CHIP_RV380_3152 0x3152
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#define PCI_CHIP_RV380_3153 0x3153
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#define PCI_CHIP_RV380_3154 0x3154
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#define PCI_CHIP_RV380_3156 0x3156
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#define PCI_CHIP_RV380_3E50 0x3E50
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#define PCI_CHIP_RV380_3E51 0x3E51
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#define PCI_CHIP_RV380_3E52 0x3E52
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#define PCI_CHIP_RV380_3E53 0x3E53
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#define PCI_CHIP_RV380_3E54 0x3E54
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#define PCI_CHIP_RV380_3E56 0x3E56
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#define PCI_CHIP_RS100_4136 0x4136
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#define PCI_CHIP_RS200_4137 0x4137
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#define PCI_CHIP_R300_AD 0x4144
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#define PCI_CHIP_R300_AE 0x4145
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#define PCI_CHIP_R300_AF 0x4146
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#define PCI_CHIP_R300_AG 0x4147
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#define PCI_CHIP_R350_AH 0x4148
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#define PCI_CHIP_R350_AI 0x4149
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#define PCI_CHIP_R350_AJ 0x414A
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#define PCI_CHIP_R350_AK 0x414B
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#define PCI_CHIP_RV350_AP 0x4150
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#define PCI_CHIP_RV350_AQ 0x4151
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#define PCI_CHIP_RV360_AR 0x4152
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#define PCI_CHIP_RV350_AS 0x4153
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#define PCI_CHIP_RV350_AT 0x4154
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#define PCI_CHIP_RV350_AV 0x4156
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#define PCI_CHIP_MACH32 0x4158
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#define PCI_CHIP_RS250_4237 0x4237
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#define PCI_CHIP_R200_BB 0x4242
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#define PCI_CHIP_R200_BC 0x4243
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#define PCI_CHIP_RS100_4336 0x4336
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#define PCI_CHIP_RS200_4337 0x4337
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#define PCI_CHIP_MACH64CT 0x4354
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#define PCI_CHIP_MACH64CX 0x4358
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#define PCI_CHIP_RS250_4437 0x4437
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#define PCI_CHIP_MACH64ET 0x4554
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#define PCI_CHIP_MACH64GB 0x4742
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#define PCI_CHIP_MACH64GD 0x4744
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#define PCI_CHIP_MACH64GI 0x4749
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#define PCI_CHIP_MACH64GL 0x474C
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#define PCI_CHIP_MACH64GM 0x474D
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#define PCI_CHIP_MACH64GN 0x474E
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#define PCI_CHIP_MACH64GO 0x474F
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#define PCI_CHIP_MACH64GP 0x4750
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#define PCI_CHIP_MACH64GQ 0x4751
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#define PCI_CHIP_MACH64GR 0x4752
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#define PCI_CHIP_MACH64GS 0x4753
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#define PCI_CHIP_MACH64GT 0x4754
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#define PCI_CHIP_MACH64GU 0x4755
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#define PCI_CHIP_MACH64GV 0x4756
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#define PCI_CHIP_MACH64GW 0x4757
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#define PCI_CHIP_MACH64GX 0x4758
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#define PCI_CHIP_MACH64GY 0x4759
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#define PCI_CHIP_MACH64GZ 0x475A
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#define PCI_CHIP_RV250_Id 0x4964
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#define PCI_CHIP_RV250_Ie 0x4965
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#define PCI_CHIP_RV250_If 0x4966
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#define PCI_CHIP_RV250_Ig 0x4967
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#define PCI_CHIP_R420_JH 0x4A48
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#define PCI_CHIP_R420_JI 0x4A49
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#define PCI_CHIP_R420_JJ 0x4A4A
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#define PCI_CHIP_R420_JK 0x4A4B
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#define PCI_CHIP_R420_JL 0x4A4C
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#define PCI_CHIP_R420_JM 0x4A4D
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#define PCI_CHIP_R420_JN 0x4A4E
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#define PCI_CHIP_R420_JP 0x4A50
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#define PCI_CHIP_MACH64LB 0x4C42
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#define PCI_CHIP_MACH64LD 0x4C44
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#define PCI_CHIP_RAGE128LE 0x4C45
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#define PCI_CHIP_RAGE128LF 0x4C46
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#define PCI_CHIP_MACH64LG 0x4C47
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#define PCI_CHIP_MACH64LI 0x4C49
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#define PCI_CHIP_MACH64LM 0x4C4D
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#define PCI_CHIP_MACH64LN 0x4C4E
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#define PCI_CHIP_MACH64LP 0x4C50
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#define PCI_CHIP_MACH64LQ 0x4C51
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#define PCI_CHIP_MACH64LR 0x4C52
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#define PCI_CHIP_MACH64LS 0x4C53
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#define PCI_CHIP_MACH64LT 0x4C54
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#define PCI_CHIP_RADEON_LW 0x4C57
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#define PCI_CHIP_RADEON_LX 0x4C58
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#define PCI_CHIP_RADEON_LY 0x4C59
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#define PCI_CHIP_RADEON_LZ 0x4C5A
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#define PCI_CHIP_RV250_Ld 0x4C64
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#define PCI_CHIP_RV250_Le 0x4C65
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#define PCI_CHIP_RV250_Lf 0x4C66
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#define PCI_CHIP_RV250_Lg 0x4C67
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#define PCI_CHIP_RV250_Ln 0x4C6E
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#define PCI_CHIP_RAGE128MF 0x4D46
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#define PCI_CHIP_RAGE128ML 0x4D4C
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#define PCI_CHIP_R300_ND 0x4E44
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#define PCI_CHIP_R300_NE 0x4E45
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#define PCI_CHIP_R300_NF 0x4E46
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#define PCI_CHIP_R300_NG 0x4E47
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#define PCI_CHIP_R350_NH 0x4E48
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#define PCI_CHIP_R350_NI 0x4E49
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#define PCI_CHIP_R360_NJ 0x4E4A
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#define PCI_CHIP_R350_NK 0x4E4B
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#define PCI_CHIP_RV350_NP 0x4E50
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#define PCI_CHIP_RV350_NQ 0x4E51
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#define PCI_CHIP_RV350_NR 0x4E52
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#define PCI_CHIP_RV350_NS 0x4E53
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#define PCI_CHIP_RV350_NT 0x4E54
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#define PCI_CHIP_RV350_NV 0x4E56
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#define PCI_CHIP_RAGE128PA 0x5041
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#define PCI_CHIP_RAGE128PB 0x5042
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#define PCI_CHIP_RAGE128PC 0x5043
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#define PCI_CHIP_RAGE128PD 0x5044
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#define PCI_CHIP_RAGE128PE 0x5045
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#define PCI_CHIP_RAGE128PF 0x5046
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#define PCI_CHIP_RAGE128PG 0x5047
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#define PCI_CHIP_RAGE128PH 0x5048
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#define PCI_CHIP_RAGE128PI 0x5049
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#define PCI_CHIP_RAGE128PJ 0x504A
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#define PCI_CHIP_RAGE128PK 0x504B
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#define PCI_CHIP_RAGE128PL 0x504C
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#define PCI_CHIP_RAGE128PM 0x504D
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#define PCI_CHIP_RAGE128PN 0x504E
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#define PCI_CHIP_RAGE128PO 0x504F
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#define PCI_CHIP_RAGE128PP 0x5050
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#define PCI_CHIP_RAGE128PQ 0x5051
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#define PCI_CHIP_RAGE128PR 0x5052
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#define PCI_CHIP_RAGE128PS 0x5053
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#define PCI_CHIP_RAGE128PT 0x5054
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#define PCI_CHIP_RAGE128PU 0x5055
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#define PCI_CHIP_RAGE128PV 0x5056
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#define PCI_CHIP_RAGE128PW 0x5057
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#define PCI_CHIP_RAGE128PX 0x5058
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#define PCI_CHIP_RADEON_QD 0x5144
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#define PCI_CHIP_RADEON_QE 0x5145
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#define PCI_CHIP_RADEON_QF 0x5146
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#define PCI_CHIP_RADEON_QG 0x5147
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#define PCI_CHIP_R200_QH 0x5148
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#define PCI_CHIP_R200_QI 0x5149
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#define PCI_CHIP_R200_QJ 0x514A
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#define PCI_CHIP_R200_QK 0x514B
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#define PCI_CHIP_R200_QL 0x514C
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#define PCI_CHIP_R200_QM 0x514D
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#define PCI_CHIP_R200_QN 0x514E
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#define PCI_CHIP_R200_QO 0x514F
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#define PCI_CHIP_RV200_QW 0x5157
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#define PCI_CHIP_RV200_QX 0x5158
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#define PCI_CHIP_RV100_QY 0x5159
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#define PCI_CHIP_RV100_QZ 0x515A
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#define PCI_CHIP_RAGE128RE 0x5245
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#define PCI_CHIP_RAGE128RF 0x5246
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#define PCI_CHIP_RAGE128RG 0x5247
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#define PCI_CHIP_RAGE128RK 0x524B
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#define PCI_CHIP_RAGE128RL 0x524C
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#define PCI_CHIP_RAGE128SE 0x5345
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#define PCI_CHIP_RAGE128SF 0x5346
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#define PCI_CHIP_RAGE128SG 0x5347
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#define PCI_CHIP_RAGE128SH 0x5348
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#define PCI_CHIP_RAGE128SK 0x534B
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#define PCI_CHIP_RAGE128SL 0x534C
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#define PCI_CHIP_RAGE128SM 0x534D
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#define PCI_CHIP_RAGE128SN 0x534E
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#define PCI_CHIP_RAGE128TF 0x5446
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#define PCI_CHIP_RAGE128TL 0x544C
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#define PCI_CHIP_RAGE128TR 0x5452
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#define PCI_CHIP_RAGE128TS 0x5453
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#define PCI_CHIP_RAGE128TT 0x5454
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#define PCI_CHIP_RAGE128TU 0x5455
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#define PCI_CHIP_RV370_5460 0x5460
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#define PCI_CHIP_RV370_5461 0x5461
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#define PCI_CHIP_RV370_5462 0x5462
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#define PCI_CHIP_RV370_5463 0x5463
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#define PCI_CHIP_RV370_5464 0x5464
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#define PCI_CHIP_RV370_5465 0x5465
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#define PCI_CHIP_RV370_5466 0x5466
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#define PCI_CHIP_RV370_5467 0x5467
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#define PCI_CHIP_R423_UH 0x5548
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#define PCI_CHIP_R423_UI 0x5549
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#define PCI_CHIP_R423_UJ 0x554A
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#define PCI_CHIP_R423_UK 0x554B
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#define PCI_CHIP_R423_UQ 0x5551
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#define PCI_CHIP_R423_UR 0x5552
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#define PCI_CHIP_R423_UT 0x5554
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#define PCI_CHIP_MACH64VT 0x5654
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#define PCI_CHIP_MACH64VU 0x5655
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#define PCI_CHIP_MACH64VV 0x5656
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#define PCI_CHIP_RS300_5834 0x5834
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#define PCI_CHIP_RS300_5835 0x5835
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#define PCI_CHIP_RS300_5836 0x5836
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#define PCI_CHIP_RS300_5837 0x5837
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#define PCI_CHIP_RV370_5B60 0x5B60
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#define PCI_CHIP_RV370_5B61 0x5B61
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#define PCI_CHIP_RV370_5B62 0x5B62
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#define PCI_CHIP_RV370_5B63 0x5B63
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#define PCI_CHIP_RV370_5B64 0x5B64
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#define PCI_CHIP_RV370_5B65 0x5B65
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#define PCI_CHIP_RV370_5B66 0x5B66
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#define PCI_CHIP_RV370_5B67 0x5B67
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#define PCI_CHIP_RV280_5960 0x5960
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#define PCI_CHIP_RV280_5961 0x5961
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#define PCI_CHIP_RV280_5962 0x5962
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#define PCI_CHIP_RV280_5964 0x5964
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#define PCI_CHIP_RV280_5C61 0x5C61
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#define PCI_CHIP_RV280_5C63 0x5C63
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#define PCI_CHIP_R423_5D57 0x5D57
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#define PCI_CHIP_RS350_7834 0x7834
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#define PCI_CHIP_RS350_7835 0x7835
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