linux_dsm_epyc7002/drivers/gpu/drm/i915/i915_oa_hsw.h
Lionel Landwerlin 3f488d9985 drm/i915/perf: rework mux configurations queries
Gen8+ might have mux configurations per slices/subslices. Depending on
whether slices/subslices have been fused off, only part of the
configuration needs to be applied. This change reworks the mux
configurations query mechanism to allow more than one set of registers
to be programmed.

v2: s/n_mux_regs/n_mux_configs/ (Matthew)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
2017-06-14 12:31:57 -07:00

41 lines
1.6 KiB
C

/*
* Autogenerated file by GPU Top : https://github.com/rib/gputop
* DO NOT EDIT manually!
*
*
* Copyright (c) 2015 Intel Corporation
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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*/
#ifndef __I915_OA_HSW_H__
#define __I915_OA_HSW_H__
extern int i915_oa_n_builtin_metric_sets_hsw;
extern int i915_oa_select_metric_set_hsw(struct drm_i915_private *dev_priv);
extern int i915_perf_register_sysfs_hsw(struct drm_i915_private *dev_priv);
extern void i915_perf_unregister_sysfs_hsw(struct drm_i915_private *dev_priv);
#endif