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https://github.com/AuxXxilium/linux_dsm_epyc7002.git
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1499ce2dd4
CPUID function 0x0d, sub function (i, i > 1) returns in ebx the offset of xstate component i. Zero is returned for a supervisor state. A supervisor state can only be saved by XSAVES and XSAVES uses a compacted format. There is no fixed offset for a supervisor state. This patch checks and makes sure a supervisor state offset is not recorded or mis-used. This has no effect in practice as we currently use no supervisor states, but it would be good to fix. Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> Reviewed-by: Dave Hansen <dave.hansen@intel.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Josh Poimboeuf <jpoimboe@redhat.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com> Cc: Ravi V. Shankar <ravi.v.shankar@intel.com> Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Link: http://lkml.kernel.org/r/81b29e40d35d4cec9f2511a856fe769f34935a3f.1466179491.git.yu-cheng.yu@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
56 lines
1.5 KiB
C
56 lines
1.5 KiB
C
#ifndef __ASM_X86_XSAVE_H
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#define __ASM_X86_XSAVE_H
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#include <linux/types.h>
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#include <asm/processor.h>
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#include <linux/uaccess.h>
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/* Bit 63 of XCR0 is reserved for future expansion */
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#define XFEATURE_MASK_EXTEND (~(XFEATURE_MASK_FPSSE | (1ULL << 63)))
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#define XSTATE_CPUID 0x0000000d
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#define FXSAVE_SIZE 512
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#define XSAVE_HDR_SIZE 64
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#define XSAVE_HDR_OFFSET FXSAVE_SIZE
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#define XSAVE_YMM_SIZE 256
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#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
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/* Supervisor features */
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#define XFEATURE_MASK_SUPERVISOR (XFEATURE_MASK_PT)
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/* Supported features which support lazy state saving */
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#define XFEATURE_MASK_LAZY (XFEATURE_MASK_FP | \
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XFEATURE_MASK_SSE | \
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XFEATURE_MASK_YMM | \
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XFEATURE_MASK_OPMASK | \
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XFEATURE_MASK_ZMM_Hi256 | \
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XFEATURE_MASK_Hi16_ZMM | \
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XFEATURE_MASK_PKRU)
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/* Supported features which require eager state saving */
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#define XFEATURE_MASK_EAGER (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)
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/* All currently supported features */
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#define XCNTXT_MASK (XFEATURE_MASK_LAZY | XFEATURE_MASK_EAGER)
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#ifdef CONFIG_X86_64
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#define REX_PREFIX "0x48, "
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#else
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#define REX_PREFIX
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#endif
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extern u64 xfeatures_mask;
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extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
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extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
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void fpu__xstate_clear_all_cpu_caps(void);
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void *get_xsave_addr(struct xregs_state *xsave, int xstate);
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const void *get_xsave_field_ptr(int xstate_field);
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int using_compacted_format(void);
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#endif
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