mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-02 18:36:45 +07:00
49521f97cc
This patch allows users to override both host and device side cable detection with "ideX=ata66" kernel parameter. Thanks to this it should be now possible to use UDMA > 2 modes on systems (laptops mainly) which use short 40-pin cable instead of 80-pin one. Next patches add automatic detection of some systems using short cables. Changes: * Rename hwif->udma_four to hwif->cbl and make it u8. * Convert all existing users accordingly (use ATA_CBL_* defines while at it). * Add ATA_CBL_PATA40_SHORT support to ide-iops.c:eighty_ninty_three(). * Use ATA_CBL_PATA40_SHORT for "ideX=ata66" kernel parameter. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Reviewed-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
255 lines
6.2 KiB
C
255 lines
6.2 KiB
C
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/*
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* Copyright (C) 2006 Red Hat <alan@redhat.com>
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*
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* May be copied or modified under the terms of the GNU General Public License
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*/
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/hdreg.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#include <asm/io.h>
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typedef enum {
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PORT_PATA0 = 0,
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PORT_PATA1 = 1,
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PORT_SATA = 2,
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} port_type;
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/**
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* ata66_jmicron - Cable check
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* @hwif: IDE port
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*
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* Returns the cable type.
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*/
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static u8 __devinit ata66_jmicron(ide_hwif_t *hwif)
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{
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struct pci_dev *pdev = hwif->pci_dev;
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u32 control;
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u32 control5;
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int port = hwif->channel;
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port_type port_map[2];
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pci_read_config_dword(pdev, 0x40, &control);
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/* There are two basic mappings. One has the two SATA ports merged
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as master/slave and the secondary as PATA, the other has only the
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SATA port mapped */
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if (control & (1 << 23)) {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_PATA0;
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} else {
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port_map[0] = PORT_SATA;
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port_map[1] = PORT_SATA;
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}
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/* The 365/366 may have this bit set to map the second PATA port
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as the internal primary channel */
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pci_read_config_dword(pdev, 0x80, &control5);
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if (control5 & (1<<24))
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port_map[0] = PORT_PATA1;
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/* The two ports may then be logically swapped by the firmware */
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if (control & (1 << 22))
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port = port ^ 1;
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/*
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* Now we know which physical port we are talking about we can
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* actually do our cable checking etc. Thankfully we don't need
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* to do the plumbing for other cases.
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*/
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switch (port_map[port])
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{
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case PORT_PATA0:
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if (control & (1 << 3)) /* 40/80 pin primary */
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return ATA_CBL_PATA40;
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return ATA_CBL_PATA80;
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case PORT_PATA1:
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if (control5 & (1 << 19)) /* 40/80 pin secondary */
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return ATA_CBL_PATA40;
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return ATA_CBL_PATA80;
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case PORT_SATA:
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break;
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}
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/* Avoid bogus "control reaches end of non-void function" */
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return ATA_CBL_PATA80;
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}
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static void jmicron_tuneproc (ide_drive_t *drive, byte mode_wanted)
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{
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return;
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}
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/**
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* config_jmicron_chipset_for_pio - set drive timings
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* @drive: drive to tune
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* @speed we want
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*
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*/
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static void config_jmicron_chipset_for_pio (ide_drive_t *drive, byte set_speed)
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{
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u8 speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, 5, NULL);
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if (set_speed)
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(void) ide_config_drive_speed(drive, speed);
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}
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/**
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* jmicron_tune_chipset - set controller timings
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* @drive: Drive to set up
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* @xferspeed: speed we want to achieve
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*
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* As the JMicron snoops for timings all we actually need to do is
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* make sure we don't set an invalid mode. We do need to honour
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* the cable detect here.
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*/
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static int jmicron_tune_chipset (ide_drive_t *drive, byte xferspeed)
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{
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u8 speed = ide_rate_filter(drive, xferspeed);
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return ide_config_drive_speed(drive, speed);
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}
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/**
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* jmicron_configure_drive_for_dma - set up for DMA transfers
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* @drive: drive we are going to set up
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*
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* As the JMicron snoops for timings all we actually need to do is
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* make sure we don't set an invalid mode.
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*/
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static int jmicron_config_drive_for_dma (ide_drive_t *drive)
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{
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if (ide_tune_dma(drive))
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return 0;
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config_jmicron_chipset_for_pio(drive, 1);
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return -1;
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}
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/**
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* init_hwif_jmicron - set up hwif structs
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* @hwif: interface to set up
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*
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* Minimal set up is required for the Jmicron hardware.
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*/
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static void __devinit init_hwif_jmicron(ide_hwif_t *hwif)
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{
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hwif->speedproc = &jmicron_tune_chipset;
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hwif->tuneproc = &jmicron_tuneproc;
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hwif->drives[0].autotune = 1;
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hwif->drives[1].autotune = 1;
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if (!hwif->dma_base)
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goto fallback;
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hwif->atapi_dma = 1;
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hwif->ultra_mask = 0x7f;
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hwif->mwdma_mask = 0x07;
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hwif->ide_dma_check = &jmicron_config_drive_for_dma;
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if (hwif->cbl != ATA_CBL_PATA40_SHORT)
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hwif->cbl = ata66_jmicron(hwif);
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->autodma;
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hwif->drives[1].autodma = hwif->autodma;
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return;
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fallback:
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hwif->autodma = 0;
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return;
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}
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#define DECLARE_JMB_DEV(name_str) \
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{ \
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.name = name_str, \
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.init_hwif = init_hwif_jmicron, \
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.channels = 2, \
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.autodma = AUTODMA, \
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.bootable = ON_BOARD, \
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.enablebits = { {0x40, 1, 1}, {0x40, 0x10, 0x10} }, \
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}
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static ide_pci_device_t jmicron_chipsets[] __devinitdata = {
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/* 0 */ DECLARE_JMB_DEV("JMB361"),
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/* 1 */ DECLARE_JMB_DEV("JMB363"),
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/* 2 */ DECLARE_JMB_DEV("JMB365"),
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/* 3 */ DECLARE_JMB_DEV("JMB366"),
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/* 4 */ DECLARE_JMB_DEV("JMB368"),
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};
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/**
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* jmicron_init_one - pci layer discovery entry
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* @dev: PCI device
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* @id: ident table entry
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*
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* Called by the PCI code when it finds a Jmicron controller.
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* We then use the IDE PCI generic helper to do most of the work.
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*/
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static int __devinit jmicron_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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ide_setup_pci_device(dev, &jmicron_chipsets[id->driver_data]);
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return 0;
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}
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/* If libata is configured, jmicron PCI quirk will configure it such
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* that the SATA ports are in AHCI function while the PATA ports are
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* in a separate IDE function. In such cases, match device class and
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* attach only to IDE. If libata isn't configured, keep the old
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* behavior for backward compatibility.
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*/
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#if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE)
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#define JMB_CLASS PCI_CLASS_STORAGE_IDE << 8
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#define JMB_CLASS_MASK 0xffff00
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#else
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#define JMB_CLASS 0
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#define JMB_CLASS_MASK 0
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#endif
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static struct pci_device_id jmicron_pci_tbl[] = {
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361,
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PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 0},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363,
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PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 1},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365,
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PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 2},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366,
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PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 3},
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{ PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368,
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PCI_ANY_ID, PCI_ANY_ID, JMB_CLASS, JMB_CLASS_MASK, 4},
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl);
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static struct pci_driver driver = {
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.name = "JMicron IDE",
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.id_table = jmicron_pci_tbl,
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.probe = jmicron_init_one,
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};
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static int __init jmicron_ide_init(void)
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{
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return ide_pci_register_driver(&driver);
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}
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module_init(jmicron_ide_init);
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("PCI driver module for the JMicron in legacy modes");
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MODULE_LICENSE("GPL");
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