linux_dsm_epyc7002/drivers/gpu/drm/msm/dsi
Rajendra Nayak 32d3e0fecc drm/msm: dsi: Use OPP API to set clk/perf state
On SDM845 and SC7180 DSI needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.

dev_pm_opp_set_rate() is designed to be equivalent to clk_set_rate()
for devices without an OPP table, hence the change works fine
on devices/platforms which only need to set a clock rate.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31 06:46:15 -07:00
..
phy drm/msm/dsi: save pll state before dsi host is powered off 2020-02-13 13:49:20 -08:00
pll drm/msm/dsi/pll: call vco set rate explicitly 2020-02-13 13:49:52 -08:00
dsi_cfg.c drm/msm: add DSI support for sc7180 2020-01-07 08:25:56 -08:00
dsi_cfg.h drm/msm: add DSI support for sc7180 2020-01-07 08:25:56 -08:00
dsi_host.c drm/msm: dsi: Use OPP API to set clk/perf state 2020-07-31 06:46:15 -07:00
dsi_manager.c Linux 5.6-rc5 2020-03-11 07:27:21 +10:00
dsi.c drm/msm/dpu: ensure device suspend happens during PM sleep 2020-07-30 13:44:52 -07:00
dsi.h drm/msm/dsi: split clk rate setting and enable 2020-01-04 08:52:04 -08:00
dsi.xml.h drm/msm: update generated headers 2018-08-10 18:49:18 -04:00
mmss_cc.xml.h drm/msm: update generated headers 2018-08-10 18:49:18 -04:00
sfpb.xml.h drm/msm: update generated headers 2018-08-10 18:49:18 -04:00