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f7d12ef53d
This patch finally adds a Device Tree binding to the mv_xor driver. Thanks to the previous cleanup patches, the Device Tree binding is relatively simply: one DT node per XOR engine, with sub-nodes for each XOR channel of the XOR engine. The binding obviously comes with the necessary documentation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: devicetree-discuss@lists.ozlabs.org
41 lines
1.1 KiB
Plaintext
41 lines
1.1 KiB
Plaintext
* Marvell XOR engines
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Required properties:
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- compatible: Should be "marvell,orion-xor"
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- reg: Should contain registers location and length (two sets)
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the first set is the low registers, the second set the high
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registers for the XOR engine.
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- clocks: pointer to the reference clock
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The DT node must also contains sub-nodes for each XOR channel that the
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XOR engine has. Those sub-nodes have the following required
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properties:
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- interrupts: interrupt of the XOR channel
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And the following optional properties:
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- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
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- dmacap,memset to indicate that the XOR channel is capable of memset operations
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- dmacap,xor to indicate that the XOR channel is capable of xor operations
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Example:
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xor@d0060900 {
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compatible = "marvell,orion-xor";
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reg = <0xd0060900 0x100
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0xd0060b00 0x100>;
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clocks = <&coreclk 0>;
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status = "okay";
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xor00 {
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interrupts = <51>;
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dmacap,memcpy;
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dmacap,xor;
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};
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xor01 {
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interrupts = <52>;
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dmacap,memcpy;
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dmacap,xor;
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dmacap,memset;
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};
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};
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