mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 14:20:50 +07:00
c6dcb10102
This patch adds a /memreserve/ section to reserve the first 4K for future use by the system. One possible use-case is trampoline code used to bring secondary cores online. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> --- v3: Update commit message based on Mark Rutland's comment v2: Add a comment in the dts files
52 lines
1.2 KiB
Plaintext
52 lines
1.2 KiB
Plaintext
/*
|
|
* Copyright (C) 2012 Altera Corporation <www.altera.com>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify
|
|
* it under the terms of the GNU General Public License as published by
|
|
* the Free Software Foundation; either version 2 of the License, or
|
|
* (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
/* First 4KB has trampoline code for secondary cores. */
|
|
/memreserve/ 0x00000000 0x0001000;
|
|
#include "socfpga.dtsi"
|
|
|
|
/ {
|
|
soc {
|
|
clkmgr@ffd04000 {
|
|
clocks {
|
|
osc1 {
|
|
clock-frequency = <25000000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
mmc0: dwmmc0@ff704000 {
|
|
num-slots = <1>;
|
|
broken-cd;
|
|
bus-width = <4>;
|
|
cap-mmc-highspeed;
|
|
cap-sd-highspeed;
|
|
};
|
|
|
|
ethernet@ff702000 {
|
|
phy-mode = "rgmii";
|
|
phy-addr = <0xffffffff>; /* probe for phy addr */
|
|
status = "okay";
|
|
};
|
|
|
|
sysmgr@ffd08000 {
|
|
cpu1-start-addr = <0xffd080c4>;
|
|
};
|
|
};
|
|
};
|