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Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 675 mass ave cambridge ma 02139 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 441 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190520071858.739733335@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
148 lines
3.6 KiB
C
148 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2009-2010 Freescale Semiconductor, Inc.
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*
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* Simple memory allocator abstraction for QorIQ (P1/P2) based Cache-SRAM
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*
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* Author: Vivek Mahajan <vivek.mahajan@freescale.com>
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*
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* This file is derived from the original work done
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* by Sylvain Munaut for the Bestcomm SRAM allocator.
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*/
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#include <linux/kernel.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/of_platform.h>
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#include <asm/pgtable.h>
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#include <asm/fsl_85xx_cache_sram.h>
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#include "fsl_85xx_cache_ctlr.h"
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struct mpc85xx_cache_sram *cache_sram;
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void *mpc85xx_cache_sram_alloc(unsigned int size,
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phys_addr_t *phys, unsigned int align)
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{
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unsigned long offset;
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unsigned long flags;
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if (unlikely(cache_sram == NULL))
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return NULL;
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if (!size || (size > cache_sram->size) || (align > cache_sram->size)) {
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pr_err("%s(): size(=%x) or align(=%x) zero or too big\n",
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__func__, size, align);
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return NULL;
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}
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if ((align & (align - 1)) || align <= 1) {
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pr_err("%s(): align(=%x) must be power of two and >1\n",
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__func__, align);
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return NULL;
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}
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spin_lock_irqsave(&cache_sram->lock, flags);
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offset = rh_alloc_align(cache_sram->rh, size, align, NULL);
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spin_unlock_irqrestore(&cache_sram->lock, flags);
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if (IS_ERR_VALUE(offset))
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return NULL;
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*phys = cache_sram->base_phys + offset;
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return (unsigned char *)cache_sram->base_virt + offset;
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}
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EXPORT_SYMBOL(mpc85xx_cache_sram_alloc);
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void mpc85xx_cache_sram_free(void *ptr)
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{
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unsigned long flags;
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BUG_ON(!ptr);
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spin_lock_irqsave(&cache_sram->lock, flags);
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rh_free(cache_sram->rh, ptr - cache_sram->base_virt);
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spin_unlock_irqrestore(&cache_sram->lock, flags);
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}
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EXPORT_SYMBOL(mpc85xx_cache_sram_free);
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int __init instantiate_cache_sram(struct platform_device *dev,
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struct sram_parameters sram_params)
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{
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int ret = 0;
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if (cache_sram) {
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dev_err(&dev->dev, "Already initialized cache-sram\n");
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return -EBUSY;
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}
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cache_sram = kzalloc(sizeof(struct mpc85xx_cache_sram), GFP_KERNEL);
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if (!cache_sram) {
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dev_err(&dev->dev, "Out of memory for cache_sram structure\n");
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return -ENOMEM;
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}
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cache_sram->base_phys = sram_params.sram_offset;
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cache_sram->size = sram_params.sram_size;
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if (!request_mem_region(cache_sram->base_phys, cache_sram->size,
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"fsl_85xx_cache_sram")) {
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dev_err(&dev->dev, "%pOF: request memory failed\n",
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dev->dev.of_node);
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ret = -ENXIO;
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goto out_free;
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}
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cache_sram->base_virt = ioremap_coherent(cache_sram->base_phys,
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cache_sram->size);
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if (!cache_sram->base_virt) {
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dev_err(&dev->dev, "%pOF: ioremap_coherent failed\n",
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dev->dev.of_node);
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ret = -ENOMEM;
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goto out_release;
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}
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cache_sram->rh = rh_create(sizeof(unsigned int));
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if (IS_ERR(cache_sram->rh)) {
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dev_err(&dev->dev, "%pOF: Unable to create remote heap\n",
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dev->dev.of_node);
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ret = PTR_ERR(cache_sram->rh);
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goto out_unmap;
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}
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rh_attach_region(cache_sram->rh, 0, cache_sram->size);
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spin_lock_init(&cache_sram->lock);
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dev_info(&dev->dev, "[base:0x%llx, size:0x%x] configured and loaded\n",
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(unsigned long long)cache_sram->base_phys, cache_sram->size);
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return 0;
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out_unmap:
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iounmap(cache_sram->base_virt);
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out_release:
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release_mem_region(cache_sram->base_phys, cache_sram->size);
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out_free:
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kfree(cache_sram);
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return ret;
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}
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void remove_cache_sram(struct platform_device *dev)
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{
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BUG_ON(!cache_sram);
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rh_detach_region(cache_sram->rh, 0, cache_sram->size);
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rh_destroy(cache_sram->rh);
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iounmap(cache_sram->base_virt);
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release_mem_region(cache_sram->base_phys, cache_sram->size);
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kfree(cache_sram);
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cache_sram = NULL;
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dev_info(&dev->dev, "MPC85xx Cache-SRAM driver unloaded\n");
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}
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