Markos Chandras 13b7ea6377 MIPS: malta: Fix GIC interrupt offsets ... The GIC interrupt offsets are calculated based on the value of NR_CPUS. However, this is wrong because NR_CPUS may or may not contain the real number of the actual cpus present in the system. We fix that by using the 'nr_cpu_ids' variable which contains the real number of cpus in the system. Previously, an MT core (eg with 8 VPEs) will fail to boot if NR_CPUS was > 8 with the following errors: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 0 at kernel/irq/chip.c:670 __irq_set_handler+0x15c/0x164() Modules linked in: CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 3.12.0-rc5-00087-gced5633 5 Stack : 00000006 00000004 00000000 00000000 00000000 00000000 807a4f36 00000053 807a0000 00000000 80173218 80565aa8 00000000 00000000 00000000 0000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 0000000 00000000 00000000 00000000 8054fd00 8054fd94 80500514 805657a7 8016eb4 807a0000 80500514 00000000 00000000 80565aa8 8079a5d8 80565766 8054fd0 ... Call Trace: [<801098c0>] show_stack+0x64/0x7c [<8049c6b0>] dump_stack+0x64/0x84 [<8012efc4>] warn_slowpath_common+0x84/0xb4 [<8012f00c>] warn_slowpath_null+0x18/0x24 [<80173218>] __irq_set_handler+0x15c/0x164 [<80587cf4>] arch_init_ipiirq+0x2c/0x3c [<805880c8>] arch_init_irq+0x3c4/0x4bc [<80588e28>] init_IRQ+0x3c/0x50 [<805847e8>] start_kernel+0x230/0x3d8 ---[ end trace 4eaa2a86a8e2da26 ]--- This is now fixed and the Malta board can boot with any NR_CPUS value which also helps supporting more processors in a single kernel binary. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6091/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2013-10-30 15:43:18 +01:00
..
Makefile	MIPS: Malta: Move platform-specific PCI code to arch/mips/pci.	2013-07-01 15:10:55 +02:00
malta-amon.c	MIPS: Whitespace cleanup.	2013-02-01 10:00:22 +01:00
malta-console.c	[MIPS] Malta: Cleanup organization of code into directories.	2008-07-15 18:44:34 +01:00
malta-display.c	MIPS: FW: malta: Code formatting clean-ups.	2013-05-08 12:30:10 +02:00
malta-init.c	MIPS: FW: malta: Code formatting clean-ups.	2013-05-08 12:30:10 +02:00
malta-int.c	MIPS: malta: Fix GIC interrupt offsets	2013-10-30 15:43:18 +01:00
malta-memory.c	MIPS: FW: malta: Code formatting clean-ups.	2013-05-08 12:30:10 +02:00
malta-platform.c	MIPS: Whitespace cleanup.	2013-02-01 10:00:22 +01:00
malta-reset.c	MIPS: malta: Remove software reset defines from generic header.	2013-06-21 18:07:01 +02:00
malta-setup.c	MIPS: FW: malta: Code formatting clean-ups.	2013-05-08 12:30:10 +02:00
malta-smtc.c	MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code	2013-07-14 19:36:51 -04:00
malta-time.c	MIPS: Cleanup CP0 PRId and CP1 FPIR register access masks	2013-09-18 20:25:19 +02:00
Platform	KVM/MIPS32: Infrastructure/build files.	2013-05-08 03:55:34 +02:00