mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-05 11:06:40 +07:00
13b79b9715
When renaming kernel_fpu_using to irq_fpu_usable, the semantics of the function is changed too, from mesuring whether kernel is using FPU, that is, the FPU is NOT available, to measuring whether FPU is usable, that is, the FPU is available. But the usage of irq_fpu_usable in aesni-intel_glue.c is not changed accordingly. This patch fixes this. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
724 lines
19 KiB
C
724 lines
19 KiB
C
/*
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* Support for Intel AES-NI instructions. This file contains glue
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* code, the real AES implementation is in intel-aes_asm.S.
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*
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* Copyright (C) 2008, Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/hardirq.h>
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#include <linux/types.h>
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#include <linux/crypto.h>
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#include <linux/err.h>
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#include <crypto/algapi.h>
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#include <crypto/aes.h>
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#include <crypto/cryptd.h>
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#include <asm/i387.h>
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#include <asm/aes.h>
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#if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
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#define HAS_CTR
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#endif
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#if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
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#define HAS_LRW
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#endif
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#if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
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#define HAS_PCBC
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#endif
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#if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
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#define HAS_XTS
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#endif
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struct async_aes_ctx {
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struct cryptd_ablkcipher *cryptd_tfm;
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};
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#define AESNI_ALIGN 16
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#define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
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asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
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unsigned int key_len);
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asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in);
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asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in);
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asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len);
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asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len);
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asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv);
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asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
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const u8 *in, unsigned int len, u8 *iv);
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static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
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{
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unsigned long addr = (unsigned long)raw_ctx;
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unsigned long align = AESNI_ALIGN;
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if (align <= crypto_tfm_ctx_alignment())
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align = 1;
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return (struct crypto_aes_ctx *)ALIGN(addr, align);
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}
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static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
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const u8 *in_key, unsigned int key_len)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
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u32 *flags = &tfm->crt_flags;
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int err;
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if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
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key_len != AES_KEYSIZE_256) {
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*flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
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return -EINVAL;
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}
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if (!irq_fpu_usable())
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err = crypto_aes_expand_key(ctx, in_key, key_len);
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else {
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kernel_fpu_begin();
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err = aesni_set_key(ctx, in_key, key_len);
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kernel_fpu_end();
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}
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return err;
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}
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static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
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unsigned int key_len)
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{
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return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
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}
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static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
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if (!irq_fpu_usable())
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crypto_aes_encrypt_x86(ctx, dst, src);
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else {
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kernel_fpu_begin();
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aesni_enc(ctx, dst, src);
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kernel_fpu_end();
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}
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}
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static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
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if (!irq_fpu_usable())
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crypto_aes_decrypt_x86(ctx, dst, src);
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else {
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kernel_fpu_begin();
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aesni_dec(ctx, dst, src);
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kernel_fpu_end();
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}
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}
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static struct crypto_alg aesni_alg = {
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.cra_name = "aes",
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.cra_driver_name = "aes-aesni",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
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.cra_alignmask = 0,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(aesni_alg.cra_list),
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.cra_u = {
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.cipher = {
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.cia_min_keysize = AES_MIN_KEY_SIZE,
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.cia_max_keysize = AES_MAX_KEY_SIZE,
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.cia_setkey = aes_set_key,
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.cia_encrypt = aes_encrypt,
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.cia_decrypt = aes_decrypt
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}
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}
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};
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static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
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aesni_enc(ctx, dst, src);
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}
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static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
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aesni_dec(ctx, dst, src);
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}
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static struct crypto_alg __aesni_alg = {
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.cra_name = "__aes-aesni",
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.cra_driver_name = "__driver-aes-aesni",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_CIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
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.cra_alignmask = 0,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(__aesni_alg.cra_list),
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.cra_u = {
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.cipher = {
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.cia_min_keysize = AES_MIN_KEY_SIZE,
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.cia_max_keysize = AES_MAX_KEY_SIZE,
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.cia_setkey = aes_set_key,
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.cia_encrypt = __aes_encrypt,
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.cia_decrypt = __aes_decrypt
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}
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}
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};
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static int ecb_encrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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while ((nbytes = walk.nbytes)) {
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aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
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nbytes & AES_BLOCK_MASK);
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nbytes &= AES_BLOCK_SIZE - 1;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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kernel_fpu_end();
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return err;
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}
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static int ecb_decrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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while ((nbytes = walk.nbytes)) {
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aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
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nbytes & AES_BLOCK_MASK);
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nbytes &= AES_BLOCK_SIZE - 1;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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kernel_fpu_end();
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return err;
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}
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static struct crypto_alg blk_ecb_alg = {
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.cra_name = "__ecb-aes-aesni",
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.cra_driver_name = "__driver-ecb-aes-aesni",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
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.cra_u = {
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.blkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = aes_set_key,
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.encrypt = ecb_encrypt,
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.decrypt = ecb_decrypt,
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},
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},
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};
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static int cbc_encrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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while ((nbytes = walk.nbytes)) {
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aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
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nbytes & AES_BLOCK_MASK, walk.iv);
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nbytes &= AES_BLOCK_SIZE - 1;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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kernel_fpu_end();
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return err;
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}
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static int cbc_decrypt(struct blkcipher_desc *desc,
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struct scatterlist *dst, struct scatterlist *src,
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unsigned int nbytes)
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{
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struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
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struct blkcipher_walk walk;
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int err;
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blkcipher_walk_init(&walk, dst, src, nbytes);
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err = blkcipher_walk_virt(desc, &walk);
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desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
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kernel_fpu_begin();
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while ((nbytes = walk.nbytes)) {
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aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
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nbytes & AES_BLOCK_MASK, walk.iv);
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nbytes &= AES_BLOCK_SIZE - 1;
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err = blkcipher_walk_done(desc, &walk, nbytes);
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}
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kernel_fpu_end();
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return err;
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}
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static struct crypto_alg blk_cbc_alg = {
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.cra_name = "__cbc-aes-aesni",
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.cra_driver_name = "__driver-cbc-aes-aesni",
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.cra_priority = 0,
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.cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
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.cra_alignmask = 0,
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.cra_type = &crypto_blkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
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.cra_u = {
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.blkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = aes_set_key,
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.encrypt = cbc_encrypt,
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.decrypt = cbc_decrypt,
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},
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},
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};
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static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
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unsigned int key_len)
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{
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struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
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struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
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int err;
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crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
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crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
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& CRYPTO_TFM_REQ_MASK);
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err = crypto_ablkcipher_setkey(child, key, key_len);
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crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
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& CRYPTO_TFM_RES_MASK);
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return err;
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}
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static int ablk_encrypt(struct ablkcipher_request *req)
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{
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struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
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struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
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if (!irq_fpu_usable()) {
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struct ablkcipher_request *cryptd_req =
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ablkcipher_request_ctx(req);
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memcpy(cryptd_req, req, sizeof(*req));
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ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
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return crypto_ablkcipher_encrypt(cryptd_req);
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} else {
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struct blkcipher_desc desc;
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desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
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desc.info = req->info;
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desc.flags = 0;
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return crypto_blkcipher_crt(desc.tfm)->encrypt(
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&desc, req->dst, req->src, req->nbytes);
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}
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}
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static int ablk_decrypt(struct ablkcipher_request *req)
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{
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struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
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struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
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if (!irq_fpu_usable()) {
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struct ablkcipher_request *cryptd_req =
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ablkcipher_request_ctx(req);
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memcpy(cryptd_req, req, sizeof(*req));
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ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
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return crypto_ablkcipher_decrypt(cryptd_req);
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} else {
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struct blkcipher_desc desc;
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desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
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desc.info = req->info;
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desc.flags = 0;
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return crypto_blkcipher_crt(desc.tfm)->decrypt(
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&desc, req->dst, req->src, req->nbytes);
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}
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}
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static void ablk_exit(struct crypto_tfm *tfm)
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{
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struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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cryptd_free_ablkcipher(ctx->cryptd_tfm);
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}
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static void ablk_init_common(struct crypto_tfm *tfm,
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struct cryptd_ablkcipher *cryptd_tfm)
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{
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struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
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ctx->cryptd_tfm = cryptd_tfm;
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tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
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crypto_ablkcipher_reqsize(&cryptd_tfm->base);
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}
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static int ablk_ecb_init(struct crypto_tfm *tfm)
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{
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struct cryptd_ablkcipher *cryptd_tfm;
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cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
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if (IS_ERR(cryptd_tfm))
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return PTR_ERR(cryptd_tfm);
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ablk_init_common(tfm, cryptd_tfm);
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return 0;
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}
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static struct crypto_alg ablk_ecb_alg = {
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.cra_name = "ecb(aes)",
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.cra_driver_name = "ecb-aes-aesni",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
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.cra_blocksize = AES_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct async_aes_ctx),
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.cra_alignmask = 0,
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.cra_type = &crypto_ablkcipher_type,
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.cra_module = THIS_MODULE,
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.cra_list = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
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.cra_init = ablk_ecb_init,
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.cra_exit = ablk_exit,
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.cra_u = {
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.ablkcipher = {
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.min_keysize = AES_MIN_KEY_SIZE,
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.max_keysize = AES_MAX_KEY_SIZE,
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.setkey = ablk_set_key,
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.encrypt = ablk_encrypt,
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.decrypt = ablk_decrypt,
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},
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},
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};
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static int ablk_cbc_init(struct crypto_tfm *tfm)
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{
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struct cryptd_ablkcipher *cryptd_tfm;
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cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
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if (IS_ERR(cryptd_tfm))
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return PTR_ERR(cryptd_tfm);
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ablk_init_common(tfm, cryptd_tfm);
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return 0;
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}
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static struct crypto_alg ablk_cbc_alg = {
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.cra_name = "cbc(aes)",
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.cra_driver_name = "cbc-aes-aesni",
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.cra_priority = 400,
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.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
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|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
|
|
.cra_init = ablk_cbc_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
};
|
|
|
|
#ifdef HAS_CTR
|
|
static int ablk_ctr_init(struct crypto_tfm *tfm)
|
|
{
|
|
struct cryptd_ablkcipher *cryptd_tfm;
|
|
|
|
cryptd_tfm = cryptd_alloc_ablkcipher("fpu(ctr(__driver-aes-aesni))",
|
|
0, 0);
|
|
if (IS_ERR(cryptd_tfm))
|
|
return PTR_ERR(cryptd_tfm);
|
|
ablk_init_common(tfm, cryptd_tfm);
|
|
return 0;
|
|
}
|
|
|
|
static struct crypto_alg ablk_ctr_alg = {
|
|
.cra_name = "ctr(aes)",
|
|
.cra_driver_name = "ctr-aes-aesni",
|
|
.cra_priority = 400,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = 1,
|
|
.cra_ctxsize = sizeof(struct async_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
|
|
.cra_init = ablk_ctr_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
.geniv = "chainiv",
|
|
},
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#ifdef HAS_LRW
|
|
static int ablk_lrw_init(struct crypto_tfm *tfm)
|
|
{
|
|
struct cryptd_ablkcipher *cryptd_tfm;
|
|
|
|
cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
|
|
0, 0);
|
|
if (IS_ERR(cryptd_tfm))
|
|
return PTR_ERR(cryptd_tfm);
|
|
ablk_init_common(tfm, cryptd_tfm);
|
|
return 0;
|
|
}
|
|
|
|
static struct crypto_alg ablk_lrw_alg = {
|
|
.cra_name = "lrw(aes)",
|
|
.cra_driver_name = "lrw-aes-aesni",
|
|
.cra_priority = 400,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
|
|
.cra_init = ablk_lrw_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#ifdef HAS_PCBC
|
|
static int ablk_pcbc_init(struct crypto_tfm *tfm)
|
|
{
|
|
struct cryptd_ablkcipher *cryptd_tfm;
|
|
|
|
cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
|
|
0, 0);
|
|
if (IS_ERR(cryptd_tfm))
|
|
return PTR_ERR(cryptd_tfm);
|
|
ablk_init_common(tfm, cryptd_tfm);
|
|
return 0;
|
|
}
|
|
|
|
static struct crypto_alg ablk_pcbc_alg = {
|
|
.cra_name = "pcbc(aes)",
|
|
.cra_driver_name = "pcbc-aes-aesni",
|
|
.cra_priority = 400,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
|
|
.cra_init = ablk_pcbc_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = AES_MIN_KEY_SIZE,
|
|
.max_keysize = AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
};
|
|
#endif
|
|
|
|
#ifdef HAS_XTS
|
|
static int ablk_xts_init(struct crypto_tfm *tfm)
|
|
{
|
|
struct cryptd_ablkcipher *cryptd_tfm;
|
|
|
|
cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
|
|
0, 0);
|
|
if (IS_ERR(cryptd_tfm))
|
|
return PTR_ERR(cryptd_tfm);
|
|
ablk_init_common(tfm, cryptd_tfm);
|
|
return 0;
|
|
}
|
|
|
|
static struct crypto_alg ablk_xts_alg = {
|
|
.cra_name = "xts(aes)",
|
|
.cra_driver_name = "xts-aes-aesni",
|
|
.cra_priority = 400,
|
|
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
|
|
.cra_blocksize = AES_BLOCK_SIZE,
|
|
.cra_ctxsize = sizeof(struct async_aes_ctx),
|
|
.cra_alignmask = 0,
|
|
.cra_type = &crypto_ablkcipher_type,
|
|
.cra_module = THIS_MODULE,
|
|
.cra_list = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
|
|
.cra_init = ablk_xts_init,
|
|
.cra_exit = ablk_exit,
|
|
.cra_u = {
|
|
.ablkcipher = {
|
|
.min_keysize = 2 * AES_MIN_KEY_SIZE,
|
|
.max_keysize = 2 * AES_MAX_KEY_SIZE,
|
|
.ivsize = AES_BLOCK_SIZE,
|
|
.setkey = ablk_set_key,
|
|
.encrypt = ablk_encrypt,
|
|
.decrypt = ablk_decrypt,
|
|
},
|
|
},
|
|
};
|
|
#endif
|
|
|
|
static int __init aesni_init(void)
|
|
{
|
|
int err;
|
|
|
|
if (!cpu_has_aes) {
|
|
printk(KERN_INFO "Intel AES-NI instructions are not detected.\n");
|
|
return -ENODEV;
|
|
}
|
|
if ((err = crypto_register_alg(&aesni_alg)))
|
|
goto aes_err;
|
|
if ((err = crypto_register_alg(&__aesni_alg)))
|
|
goto __aes_err;
|
|
if ((err = crypto_register_alg(&blk_ecb_alg)))
|
|
goto blk_ecb_err;
|
|
if ((err = crypto_register_alg(&blk_cbc_alg)))
|
|
goto blk_cbc_err;
|
|
if ((err = crypto_register_alg(&ablk_ecb_alg)))
|
|
goto ablk_ecb_err;
|
|
if ((err = crypto_register_alg(&ablk_cbc_alg)))
|
|
goto ablk_cbc_err;
|
|
#ifdef HAS_CTR
|
|
if ((err = crypto_register_alg(&ablk_ctr_alg)))
|
|
goto ablk_ctr_err;
|
|
#endif
|
|
#ifdef HAS_LRW
|
|
if ((err = crypto_register_alg(&ablk_lrw_alg)))
|
|
goto ablk_lrw_err;
|
|
#endif
|
|
#ifdef HAS_PCBC
|
|
if ((err = crypto_register_alg(&ablk_pcbc_alg)))
|
|
goto ablk_pcbc_err;
|
|
#endif
|
|
#ifdef HAS_XTS
|
|
if ((err = crypto_register_alg(&ablk_xts_alg)))
|
|
goto ablk_xts_err;
|
|
#endif
|
|
|
|
return err;
|
|
|
|
#ifdef HAS_XTS
|
|
ablk_xts_err:
|
|
#endif
|
|
#ifdef HAS_PCBC
|
|
crypto_unregister_alg(&ablk_pcbc_alg);
|
|
ablk_pcbc_err:
|
|
#endif
|
|
#ifdef HAS_LRW
|
|
crypto_unregister_alg(&ablk_lrw_alg);
|
|
ablk_lrw_err:
|
|
#endif
|
|
#ifdef HAS_CTR
|
|
crypto_unregister_alg(&ablk_ctr_alg);
|
|
ablk_ctr_err:
|
|
#endif
|
|
crypto_unregister_alg(&ablk_cbc_alg);
|
|
ablk_cbc_err:
|
|
crypto_unregister_alg(&ablk_ecb_alg);
|
|
ablk_ecb_err:
|
|
crypto_unregister_alg(&blk_cbc_alg);
|
|
blk_cbc_err:
|
|
crypto_unregister_alg(&blk_ecb_alg);
|
|
blk_ecb_err:
|
|
crypto_unregister_alg(&__aesni_alg);
|
|
__aes_err:
|
|
crypto_unregister_alg(&aesni_alg);
|
|
aes_err:
|
|
return err;
|
|
}
|
|
|
|
static void __exit aesni_exit(void)
|
|
{
|
|
#ifdef HAS_XTS
|
|
crypto_unregister_alg(&ablk_xts_alg);
|
|
#endif
|
|
#ifdef HAS_PCBC
|
|
crypto_unregister_alg(&ablk_pcbc_alg);
|
|
#endif
|
|
#ifdef HAS_LRW
|
|
crypto_unregister_alg(&ablk_lrw_alg);
|
|
#endif
|
|
#ifdef HAS_CTR
|
|
crypto_unregister_alg(&ablk_ctr_alg);
|
|
#endif
|
|
crypto_unregister_alg(&ablk_cbc_alg);
|
|
crypto_unregister_alg(&ablk_ecb_alg);
|
|
crypto_unregister_alg(&blk_cbc_alg);
|
|
crypto_unregister_alg(&blk_ecb_alg);
|
|
crypto_unregister_alg(&__aesni_alg);
|
|
crypto_unregister_alg(&aesni_alg);
|
|
}
|
|
|
|
module_init(aesni_init);
|
|
module_exit(aesni_exit);
|
|
|
|
MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("aes");
|