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139563ad27
Move OMAP3xxx-specific PRM functions & macros into prm3xxx.[ch] and OMAP2xxx-specific macros into prm2xxx.h. (prm2xxx.c will be created by a subsequent patch when it's needed.) Move basic PRM register access functions into static inline functions in prm2xxx_3xxx.h, leaving only OMAP2/3 hardreset functions in prm2xxx_3xxx.c. Also clarify the initcall function naming to reinforce that this code is specifically for the PRM IP block. This is in preparation for the upcoming powerdomain series and the upcoming move of this code to drivers/. Signed-off-by: Paul Walmsley <paul@pwsan.com> Reviewed-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
101 lines
3.4 KiB
C
101 lines
3.4 KiB
C
/*
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* OMAP2/3 PRM module functions
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*
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* Copyright (C) 2010-2011 Texas Instruments, Inc.
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* Copyright (C) 2010 Nokia Corporation
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* Benoît Cousson
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include "common.h"
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#include "prm2xxx_3xxx.h"
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#include "prm-regbits-24xx.h"
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/**
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* omap2_prm_is_hardreset_asserted - read the HW reset line state of
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* submodules contained in the hwmod module
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* @prm_mod: PRM submodule base (e.g. CORE_MOD)
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* @shift: register bit shift corresponding to the reset line to check
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*
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* Returns 1 if the (sub)module hardreset line is currently asserted,
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* 0 if the (sub)module hardreset line is not currently asserted, or
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* -EINVAL if called while running on a non-OMAP2/3 chip.
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*/
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int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
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{
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return omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL,
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(1 << shift));
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}
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/**
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* omap2_prm_assert_hardreset - assert the HW reset line of a submodule
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* @prm_mod: PRM submodule base (e.g. CORE_MOD)
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* @shift: register bit shift corresponding to the reset line to assert
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*
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* Some IPs like dsp or iva contain processors that require an HW
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* reset line to be asserted / deasserted in order to fully enable the
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* IP. These modules may have multiple hard-reset lines that reset
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* different 'submodules' inside the IP block. This function will
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* place the submodule into reset. Returns 0 upon success or -EINVAL
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* upon an argument error.
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*/
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int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift)
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{
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u32 mask;
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mask = 1 << shift;
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omap2_prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL);
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return 0;
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}
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/**
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* omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
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* @prm_mod: PRM submodule base (e.g. CORE_MOD)
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* @rst_shift: register bit shift corresponding to the reset line to deassert
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* @st_shift: register bit shift for the status of the deasserted submodule
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*
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* Some IPs like dsp or iva contain processors that require an HW
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* reset line to be asserted / deasserted in order to fully enable the
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* IP. These modules may have multiple hard-reset lines that reset
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* different 'submodules' inside the IP block. This function will
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* take the submodule out of reset and wait until the PRCM indicates
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* that the reset has completed before returning. Returns 0 upon success or
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* -EINVAL upon an argument error, -EEXIST if the submodule was already out
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* of reset, or -EBUSY if the submodule did not exit reset promptly.
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*/
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int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
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{
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u32 rst, st;
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int c;
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rst = 1 << rst_shift;
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st = 1 << st_shift;
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/* Check the current status to avoid de-asserting the line twice */
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if (omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, rst) == 0)
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return -EEXIST;
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/* Clear the reset status by writing 1 to the status bit */
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omap2_prm_rmw_mod_reg_bits(0xffffffff, st, prm_mod, OMAP2_RM_RSTST);
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/* de-assert the reset control line */
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omap2_prm_rmw_mod_reg_bits(rst, 0, prm_mod, OMAP2_RM_RSTCTRL);
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/* wait the status to be set */
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omap_test_timeout(omap2_prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST,
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st),
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MAX_MODULE_HARDRESET_WAIT, c);
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return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
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}
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