mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-26 16:35:13 +07:00
0a67352153
In SKL, HDMI/DP codec and PCH HD Audio Controller are in different power wells, so it's necessary to reset display audio codecs when power well on, otherwise display audio codecs will disappear when resume from low power state. Reset steps when power on: enable codec wakeup -> azx_init_chip() -> disable codec wakeup The callback for codec wakeup enable/disable is in drivers/gpu/drm/i915/. Signed-off-by: Lu, Han <han.lu@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
228 lines
5.6 KiB
C
228 lines
5.6 KiB
C
/*
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* hda_i915.c - routines for Haswell HDA controller power well support
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software Foundation,
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* Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/component.h>
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#include <drm/i915_component.h>
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#include <sound/core.h>
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#include "hda_controller.h"
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#include "hda_intel.h"
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/* Intel HSW/BDW display HDA controller Extended Mode registers.
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* EM4 (M value) and EM5 (N Value) are used to convert CDClk (Core Display
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* Clock) to 24MHz BCLK: BCLK = CDCLK * M / N
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* The values will be lost when the display power well is disabled.
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*/
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#define AZX_REG_EM4 0x100c
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#define AZX_REG_EM5 0x1010
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int hda_set_codec_wakeup(struct hda_intel *hda, bool enable)
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{
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struct i915_audio_component *acomp = &hda->audio_component;
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if (!acomp->ops)
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return -ENODEV;
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if (!acomp->ops->codec_wake_override) {
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dev_warn(&hda->chip.pci->dev,
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"Invalid codec wake callback\n");
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return 0;
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}
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dev_dbg(&hda->chip.pci->dev, "%s codec wakeup\n",
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enable ? "enable" : "disable");
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acomp->ops->codec_wake_override(acomp->dev, enable);
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return 0;
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}
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int hda_display_power(struct hda_intel *hda, bool enable)
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{
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struct i915_audio_component *acomp = &hda->audio_component;
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if (!acomp->ops)
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return -ENODEV;
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dev_dbg(&hda->chip.pci->dev, "display power %s\n",
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enable ? "enable" : "disable");
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if (enable) {
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if (!hda->i915_power_refcount++)
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acomp->ops->get_power(acomp->dev);
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} else {
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WARN_ON(!hda->i915_power_refcount);
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if (!--hda->i915_power_refcount)
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acomp->ops->put_power(acomp->dev);
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}
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return 0;
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}
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void haswell_set_bclk(struct hda_intel *hda)
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{
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int cdclk_freq;
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unsigned int bclk_m, bclk_n;
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struct i915_audio_component *acomp = &hda->audio_component;
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struct pci_dev *pci = hda->chip.pci;
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/* Only Haswell/Broadwell need set BCLK */
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if (pci->device != 0x0a0c && pci->device != 0x0c0c
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&& pci->device != 0x0d0c && pci->device != 0x160c)
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return;
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if (!acomp->ops)
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return;
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cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
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switch (cdclk_freq) {
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case 337500:
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bclk_m = 16;
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bclk_n = 225;
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break;
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case 450000:
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default: /* default CDCLK 450MHz */
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bclk_m = 4;
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bclk_n = 75;
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break;
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case 540000:
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bclk_m = 4;
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bclk_n = 90;
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break;
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case 675000:
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bclk_m = 8;
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bclk_n = 225;
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break;
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}
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azx_writew(&hda->chip, EM4, bclk_m);
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azx_writew(&hda->chip, EM5, bclk_n);
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}
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static int hda_component_master_bind(struct device *dev)
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{
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struct snd_card *card = dev_get_drvdata(dev);
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struct azx *chip = card->private_data;
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struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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struct i915_audio_component *acomp = &hda->audio_component;
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int ret;
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ret = component_bind_all(dev, acomp);
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if (ret < 0)
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return ret;
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if (WARN_ON(!(acomp->dev && acomp->ops && acomp->ops->get_power &&
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acomp->ops->put_power && acomp->ops->get_cdclk_freq))) {
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ret = -EINVAL;
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goto out_unbind;
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}
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/*
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* Atm, we don't support dynamic unbinding initiated by the child
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* component, so pin its containing module until we unbind.
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*/
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if (!try_module_get(acomp->ops->owner)) {
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ret = -ENODEV;
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goto out_unbind;
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}
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return 0;
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out_unbind:
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component_unbind_all(dev, acomp);
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return ret;
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}
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static void hda_component_master_unbind(struct device *dev)
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{
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struct snd_card *card = dev_get_drvdata(dev);
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struct azx *chip = card->private_data;
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struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
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struct i915_audio_component *acomp = &hda->audio_component;
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module_put(acomp->ops->owner);
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component_unbind_all(dev, acomp);
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WARN_ON(acomp->ops || acomp->dev);
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}
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static const struct component_master_ops hda_component_master_ops = {
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.bind = hda_component_master_bind,
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.unbind = hda_component_master_unbind,
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};
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static int hda_component_master_match(struct device *dev, void *data)
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{
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/* i915 is the only supported component */
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return !strcmp(dev->driver->name, "i915");
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}
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int hda_i915_init(struct hda_intel *hda)
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{
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struct component_match *match = NULL;
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struct device *dev = &hda->chip.pci->dev;
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struct i915_audio_component *acomp = &hda->audio_component;
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int ret;
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component_match_add(dev, &match, hda_component_master_match, hda);
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ret = component_master_add_with_match(dev, &hda_component_master_ops,
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match);
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if (ret < 0)
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goto out_err;
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/*
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* Atm, we don't support deferring the component binding, so make sure
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* i915 is loaded and that the binding successfully completes.
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*/
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request_module("i915");
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if (!acomp->ops) {
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ret = -ENODEV;
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goto out_master_del;
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}
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dev_dbg(dev, "bound to i915 component master\n");
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return 0;
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out_master_del:
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component_master_del(dev, &hda_component_master_ops);
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out_err:
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dev_err(dev, "failed to add i915 component master (%d)\n", ret);
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return ret;
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}
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int hda_i915_exit(struct hda_intel *hda)
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{
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struct device *dev = &hda->chip.pci->dev;
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struct i915_audio_component *acomp = &hda->audio_component;
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WARN_ON(hda->i915_power_refcount);
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if (hda->i915_power_refcount > 0 && acomp->ops)
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acomp->ops->put_power(acomp->dev);
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component_master_del(dev, &hda_component_master_ops);
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return 0;
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}
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