mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-11-26 22:30:54 +07:00
a6c06ed1a6
Provide a CPUID leaf that describes the emulated PMU. Signed-off-by: Gleb Natapov <gleb@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
671 lines
17 KiB
C
671 lines
17 KiB
C
/*
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* Kernel-based Virtual Machine driver for Linux
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* cpuid support routines
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*
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* derived from arch/x86/kvm/x86.c
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*
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* Copyright 2011 Red Hat, Inc. and/or its affiliates.
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* Copyright IBM Corporation, 2008
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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#include <linux/kvm_host.h>
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#include <linux/module.h>
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#include <linux/vmalloc.h>
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#include <linux/uaccess.h>
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#include <asm/user.h>
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#include <asm/xsave.h>
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#include "cpuid.h"
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#include "lapic.h"
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#include "mmu.h"
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#include "trace.h"
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void kvm_update_cpuid(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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struct kvm_lapic *apic = vcpu->arch.apic;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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if (!best)
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return;
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/* Update OSXSAVE bit */
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if (cpu_has_xsave && best->function == 0x1) {
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best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
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if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
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best->ecx |= bit(X86_FEATURE_OSXSAVE);
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}
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if (apic) {
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if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
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apic->lapic_timer.timer_mode_mask = 3 << 17;
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else
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apic->lapic_timer.timer_mode_mask = 1 << 17;
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}
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kvm_pmu_cpuid_update(vcpu);
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}
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static int is_efer_nx(void)
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{
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unsigned long long efer = 0;
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rdmsrl_safe(MSR_EFER, &efer);
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return efer & EFER_NX;
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}
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static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
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{
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int i;
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struct kvm_cpuid_entry2 *e, *entry;
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entry = NULL;
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for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
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e = &vcpu->arch.cpuid_entries[i];
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if (e->function == 0x80000001) {
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entry = e;
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break;
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}
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}
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if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
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entry->edx &= ~(1 << 20);
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printk(KERN_INFO "kvm: guest NX capability removed\n");
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}
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}
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/* when an old userspace process fills a new kernel module */
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int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
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struct kvm_cpuid *cpuid,
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struct kvm_cpuid_entry __user *entries)
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{
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int r, i;
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struct kvm_cpuid_entry *cpuid_entries;
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r = -E2BIG;
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if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
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goto out;
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r = -ENOMEM;
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cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
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if (!cpuid_entries)
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goto out;
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r = -EFAULT;
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if (copy_from_user(cpuid_entries, entries,
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cpuid->nent * sizeof(struct kvm_cpuid_entry)))
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goto out_free;
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for (i = 0; i < cpuid->nent; i++) {
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vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
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vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
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vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
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vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
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vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
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vcpu->arch.cpuid_entries[i].index = 0;
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vcpu->arch.cpuid_entries[i].flags = 0;
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vcpu->arch.cpuid_entries[i].padding[0] = 0;
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vcpu->arch.cpuid_entries[i].padding[1] = 0;
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vcpu->arch.cpuid_entries[i].padding[2] = 0;
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}
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vcpu->arch.cpuid_nent = cpuid->nent;
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cpuid_fix_nx_cap(vcpu);
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r = 0;
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kvm_apic_set_version(vcpu);
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kvm_x86_ops->cpuid_update(vcpu);
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kvm_update_cpuid(vcpu);
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out_free:
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vfree(cpuid_entries);
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out:
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return r;
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}
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int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
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struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries)
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{
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int r;
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r = -E2BIG;
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if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
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goto out;
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r = -EFAULT;
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if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
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cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
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goto out;
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vcpu->arch.cpuid_nent = cpuid->nent;
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kvm_apic_set_version(vcpu);
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kvm_x86_ops->cpuid_update(vcpu);
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kvm_update_cpuid(vcpu);
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return 0;
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out:
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return r;
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}
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int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
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struct kvm_cpuid2 *cpuid,
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struct kvm_cpuid_entry2 __user *entries)
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{
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int r;
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r = -E2BIG;
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if (cpuid->nent < vcpu->arch.cpuid_nent)
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goto out;
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r = -EFAULT;
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if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
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vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
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goto out;
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return 0;
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out:
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cpuid->nent = vcpu->arch.cpuid_nent;
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return r;
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}
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static void cpuid_mask(u32 *word, int wordnum)
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{
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*word &= boot_cpu_data.x86_capability[wordnum];
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}
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static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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u32 index)
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{
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entry->function = function;
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entry->index = index;
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cpuid_count(entry->function, entry->index,
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&entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
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entry->flags = 0;
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}
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static bool supported_xcr0_bit(unsigned bit)
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{
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u64 mask = ((u64)1 << bit);
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return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
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}
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#define F(x) bit(X86_FEATURE_##x)
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static int do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
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u32 index, int *nent, int maxnent)
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{
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int r;
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unsigned f_nx = is_efer_nx() ? F(NX) : 0;
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#ifdef CONFIG_X86_64
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unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
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? F(GBPAGES) : 0;
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unsigned f_lm = F(LM);
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#else
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unsigned f_gbpages = 0;
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unsigned f_lm = 0;
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#endif
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unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
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/* cpuid 1.edx */
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const u32 kvm_supported_word0_x86_features =
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F(FPU) | F(VME) | F(DE) | F(PSE) |
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F(TSC) | F(MSR) | F(PAE) | F(MCE) |
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F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
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F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
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F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
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0 /* Reserved, DS, ACPI */ | F(MMX) |
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F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
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0 /* HTT, TM, Reserved, PBE */;
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/* cpuid 0x80000001.edx */
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const u32 kvm_supported_word1_x86_features =
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F(FPU) | F(VME) | F(DE) | F(PSE) |
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F(TSC) | F(MSR) | F(PAE) | F(MCE) |
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F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
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F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
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F(PAT) | F(PSE36) | 0 /* Reserved */ |
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f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
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F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
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0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
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/* cpuid 1.ecx */
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const u32 kvm_supported_word4_x86_features =
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F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
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0 /* DS-CPL, VMX, SMX, EST */ |
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0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
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F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
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0 /* Reserved, DCA */ | F(XMM4_1) |
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F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
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0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
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F(F16C) | F(RDRAND);
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/* cpuid 0x80000001.ecx */
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const u32 kvm_supported_word6_x86_features =
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F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
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F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
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F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
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0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
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/* cpuid 0xC0000001.edx */
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const u32 kvm_supported_word5_x86_features =
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F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
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F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
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F(PMM) | F(PMM_EN);
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/* cpuid 7.0.ebx */
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const u32 kvm_supported_word9_x86_features =
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F(FSGSBASE) | F(BMI1) | F(AVX2) | F(SMEP) | F(BMI2) | F(ERMS);
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/* all calls to cpuid_count() should be made on the same cpu */
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get_cpu();
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r = -E2BIG;
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if (*nent >= maxnent)
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goto out;
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do_cpuid_1_ent(entry, function, index);
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++*nent;
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switch (function) {
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case 0:
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entry->eax = min(entry->eax, (u32)0xd);
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break;
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case 1:
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entry->edx &= kvm_supported_word0_x86_features;
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cpuid_mask(&entry->edx, 0);
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entry->ecx &= kvm_supported_word4_x86_features;
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cpuid_mask(&entry->ecx, 4);
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/* we support x2apic emulation even if host does not support
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* it since we emulate x2apic in software */
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entry->ecx |= F(X2APIC);
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break;
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/* function 2 entries are STATEFUL. That is, repeated cpuid commands
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* may return different values. This forces us to get_cpu() before
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* issuing the first command, and also to emulate this annoying behavior
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* in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
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case 2: {
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int t, times = entry->eax & 0xff;
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entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
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entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
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for (t = 1; t < times; ++t) {
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if (*nent >= maxnent)
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goto out;
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do_cpuid_1_ent(&entry[t], function, 0);
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entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
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++*nent;
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}
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break;
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}
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/* function 4 has additional index. */
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case 4: {
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int i, cache_type;
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entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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/* read more entries until cache_type is zero */
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for (i = 1; ; ++i) {
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if (*nent >= maxnent)
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goto out;
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cache_type = entry[i - 1].eax & 0x1f;
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if (!cache_type)
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break;
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do_cpuid_1_ent(&entry[i], function, i);
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entry[i].flags |=
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KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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++*nent;
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}
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break;
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}
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case 7: {
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entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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/* Mask ebx against host capbability word 9 */
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if (index == 0) {
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entry->ebx &= kvm_supported_word9_x86_features;
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cpuid_mask(&entry->ebx, 9);
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} else
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entry->ebx = 0;
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entry->eax = 0;
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entry->ecx = 0;
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entry->edx = 0;
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break;
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}
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case 9:
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break;
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case 0xa: { /* Architectural Performance Monitoring */
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struct x86_pmu_capability cap;
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union cpuid10_eax eax;
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union cpuid10_edx edx;
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perf_get_x86_pmu_capability(&cap);
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/*
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* Only support guest architectural pmu on a host
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* with architectural pmu.
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*/
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if (!cap.version)
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memset(&cap, 0, sizeof(cap));
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eax.split.version_id = min(cap.version, 2);
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eax.split.num_counters = cap.num_counters_gp;
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eax.split.bit_width = cap.bit_width_gp;
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eax.split.mask_length = cap.events_mask_len;
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edx.split.num_counters_fixed = cap.num_counters_fixed;
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edx.split.bit_width_fixed = cap.bit_width_fixed;
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edx.split.reserved = 0;
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entry->eax = eax.full;
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entry->ebx = cap.events_mask;
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entry->ecx = 0;
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entry->edx = edx.full;
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break;
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}
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/* function 0xb has additional index. */
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case 0xb: {
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int i, level_type;
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entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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/* read more entries until level_type is zero */
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for (i = 1; ; ++i) {
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if (*nent >= maxnent)
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goto out;
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level_type = entry[i - 1].ecx & 0xff00;
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if (!level_type)
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break;
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do_cpuid_1_ent(&entry[i], function, i);
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entry[i].flags |=
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KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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++*nent;
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}
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break;
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}
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case 0xd: {
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int idx, i;
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entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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for (idx = 1, i = 1; idx < 64; ++idx) {
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if (*nent >= maxnent)
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goto out;
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do_cpuid_1_ent(&entry[i], function, idx);
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if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
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continue;
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entry[i].flags |=
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KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
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++*nent;
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++i;
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}
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break;
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}
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case KVM_CPUID_SIGNATURE: {
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char signature[12] = "KVMKVMKVM\0\0";
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u32 *sigptr = (u32 *)signature;
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entry->eax = 0;
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entry->ebx = sigptr[0];
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entry->ecx = sigptr[1];
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entry->edx = sigptr[2];
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break;
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}
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case KVM_CPUID_FEATURES:
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entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
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(1 << KVM_FEATURE_NOP_IO_DELAY) |
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(1 << KVM_FEATURE_CLOCKSOURCE2) |
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(1 << KVM_FEATURE_ASYNC_PF) |
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(1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
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if (sched_info_on())
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entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
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entry->ebx = 0;
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entry->ecx = 0;
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entry->edx = 0;
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break;
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case 0x80000000:
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entry->eax = min(entry->eax, 0x8000001a);
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break;
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case 0x80000001:
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entry->edx &= kvm_supported_word1_x86_features;
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cpuid_mask(&entry->edx, 1);
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entry->ecx &= kvm_supported_word6_x86_features;
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cpuid_mask(&entry->ecx, 6);
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break;
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case 0x80000008: {
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unsigned g_phys_as = (entry->eax >> 16) & 0xff;
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unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
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unsigned phys_as = entry->eax & 0xff;
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if (!g_phys_as)
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g_phys_as = phys_as;
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entry->eax = g_phys_as | (virt_as << 8);
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entry->ebx = entry->edx = 0;
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break;
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}
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case 0x80000019:
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entry->ecx = entry->edx = 0;
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break;
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case 0x8000001a:
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break;
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case 0x8000001d:
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break;
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/*Add support for Centaur's CPUID instruction*/
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case 0xC0000000:
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/*Just support up to 0xC0000004 now*/
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entry->eax = min(entry->eax, 0xC0000004);
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break;
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case 0xC0000001:
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entry->edx &= kvm_supported_word5_x86_features;
|
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cpuid_mask(&entry->edx, 5);
|
|
break;
|
|
case 3: /* Processor serial number */
|
|
case 5: /* MONITOR/MWAIT */
|
|
case 6: /* Thermal management */
|
|
case 0x80000007: /* Advanced power management */
|
|
case 0xC0000002:
|
|
case 0xC0000003:
|
|
case 0xC0000004:
|
|
default:
|
|
entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
|
|
break;
|
|
}
|
|
|
|
kvm_x86_ops->set_supported_cpuid(function, entry);
|
|
|
|
r = 0;
|
|
|
|
out:
|
|
put_cpu();
|
|
|
|
return r;
|
|
}
|
|
|
|
#undef F
|
|
|
|
struct kvm_cpuid_param {
|
|
u32 func;
|
|
u32 idx;
|
|
bool has_leaf_count;
|
|
bool (*qualifier)(struct kvm_cpuid_param *param);
|
|
};
|
|
|
|
static bool is_centaur_cpu(struct kvm_cpuid_param *param)
|
|
{
|
|
return boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR;
|
|
}
|
|
|
|
int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
|
|
struct kvm_cpuid_entry2 __user *entries)
|
|
{
|
|
struct kvm_cpuid_entry2 *cpuid_entries;
|
|
int limit, nent = 0, r = -E2BIG, i;
|
|
u32 func;
|
|
static struct kvm_cpuid_param param[] = {
|
|
{ .func = 0, .has_leaf_count = true },
|
|
{ .func = 0x80000000, .has_leaf_count = true },
|
|
{ .func = 0xC0000000, .qualifier = is_centaur_cpu, .has_leaf_count = true },
|
|
{ .func = KVM_CPUID_SIGNATURE },
|
|
{ .func = KVM_CPUID_FEATURES },
|
|
};
|
|
|
|
if (cpuid->nent < 1)
|
|
goto out;
|
|
if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
|
|
cpuid->nent = KVM_MAX_CPUID_ENTRIES;
|
|
r = -ENOMEM;
|
|
cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
|
|
if (!cpuid_entries)
|
|
goto out;
|
|
|
|
r = 0;
|
|
for (i = 0; i < ARRAY_SIZE(param); i++) {
|
|
struct kvm_cpuid_param *ent = ¶m[i];
|
|
|
|
if (ent->qualifier && !ent->qualifier(ent))
|
|
continue;
|
|
|
|
r = do_cpuid_ent(&cpuid_entries[nent], ent->func, ent->idx,
|
|
&nent, cpuid->nent);
|
|
|
|
if (r)
|
|
goto out_free;
|
|
|
|
if (!ent->has_leaf_count)
|
|
continue;
|
|
|
|
limit = cpuid_entries[nent - 1].eax;
|
|
for (func = ent->func + 1; func <= limit && nent < cpuid->nent && r == 0; ++func)
|
|
r = do_cpuid_ent(&cpuid_entries[nent], func, ent->idx,
|
|
&nent, cpuid->nent);
|
|
|
|
if (r)
|
|
goto out_free;
|
|
}
|
|
|
|
r = -EFAULT;
|
|
if (copy_to_user(entries, cpuid_entries,
|
|
nent * sizeof(struct kvm_cpuid_entry2)))
|
|
goto out_free;
|
|
cpuid->nent = nent;
|
|
r = 0;
|
|
|
|
out_free:
|
|
vfree(cpuid_entries);
|
|
out:
|
|
return r;
|
|
}
|
|
|
|
static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
|
|
{
|
|
struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
|
|
int j, nent = vcpu->arch.cpuid_nent;
|
|
|
|
e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
|
|
/* when no next entry is found, the current entry[i] is reselected */
|
|
for (j = i + 1; ; j = (j + 1) % nent) {
|
|
struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
|
|
if (ej->function == e->function) {
|
|
ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
|
|
return j;
|
|
}
|
|
}
|
|
return 0; /* silence gcc, even though control never reaches here */
|
|
}
|
|
|
|
/* find an entry with matching function, matching index (if needed), and that
|
|
* should be read next (if it's stateful) */
|
|
static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
|
|
u32 function, u32 index)
|
|
{
|
|
if (e->function != function)
|
|
return 0;
|
|
if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
|
|
return 0;
|
|
if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
|
|
!(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
|
|
u32 function, u32 index)
|
|
{
|
|
int i;
|
|
struct kvm_cpuid_entry2 *best = NULL;
|
|
|
|
for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
|
|
struct kvm_cpuid_entry2 *e;
|
|
|
|
e = &vcpu->arch.cpuid_entries[i];
|
|
if (is_matching_cpuid_entry(e, function, index)) {
|
|
if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
|
|
move_to_next_stateful_cpuid_entry(vcpu, i);
|
|
best = e;
|
|
break;
|
|
}
|
|
}
|
|
return best;
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
|
|
|
|
int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
|
|
{
|
|
struct kvm_cpuid_entry2 *best;
|
|
|
|
best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
|
|
if (!best || best->eax < 0x80000008)
|
|
goto not_found;
|
|
best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
|
|
if (best)
|
|
return best->eax & 0xff;
|
|
not_found:
|
|
return 36;
|
|
}
|
|
|
|
/*
|
|
* If no match is found, check whether we exceed the vCPU's limit
|
|
* and return the content of the highest valid _standard_ leaf instead.
|
|
* This is to satisfy the CPUID specification.
|
|
*/
|
|
static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
|
|
u32 function, u32 index)
|
|
{
|
|
struct kvm_cpuid_entry2 *maxlevel;
|
|
|
|
maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
|
|
if (!maxlevel || maxlevel->eax >= function)
|
|
return NULL;
|
|
if (function & 0x80000000) {
|
|
maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
|
|
if (!maxlevel)
|
|
return NULL;
|
|
}
|
|
return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
|
|
}
|
|
|
|
void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
|
|
{
|
|
u32 function, index;
|
|
struct kvm_cpuid_entry2 *best;
|
|
|
|
function = kvm_register_read(vcpu, VCPU_REGS_RAX);
|
|
index = kvm_register_read(vcpu, VCPU_REGS_RCX);
|
|
kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
|
|
kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
|
|
kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
|
|
kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
|
|
best = kvm_find_cpuid_entry(vcpu, function, index);
|
|
|
|
if (!best)
|
|
best = check_cpuid_limit(vcpu, function, index);
|
|
|
|
if (best) {
|
|
kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
|
|
kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
|
|
kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
|
|
kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
|
|
}
|
|
kvm_x86_ops->skip_emulated_instruction(vcpu);
|
|
trace_kvm_cpuid(function,
|
|
kvm_register_read(vcpu, VCPU_REGS_RAX),
|
|
kvm_register_read(vcpu, VCPU_REGS_RBX),
|
|
kvm_register_read(vcpu, VCPU_REGS_RCX),
|
|
kvm_register_read(vcpu, VCPU_REGS_RDX));
|
|
}
|
|
EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
|