mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-03 19:06:41 +07:00
bc765bf3b9
Take care of FW & NVS with the auto-detection between wl127x and wl128x. [Moved some common code outside if statements and added notes about NVS structure assumptions; Fixed a bug when checking the nvs size: if the size was incorrect, the local nvs variable was set to NULL, it should be wl->nvs instead. -- Luca] [Merged with potential buffer overflow fix -- Luca] Signed-off-by: Shahar Levi <shahar_levi@ti.com> Reviewed-by: Luciano Coelho <coelho@ti.com> Signed-off-by: Luciano Coelho <coelho@ti.com>
218 lines
7.0 KiB
C
218 lines
7.0 KiB
C
/*
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* This file is part of wl1271
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*
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* Copyright (C) 2010 Nokia Corporation
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*
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* Contact: Luciano Coelho <luciano.coelho@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __INI_H__
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#define __INI_H__
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#define WL1271_INI_MAX_SMART_REFLEX_PARAM 16
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struct wl1271_ini_general_params {
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u8 ref_clock;
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u8 settling_time;
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u8 clk_valid_on_wakeup;
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u8 dc2dc_mode;
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u8 dual_mode_select;
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u8 tx_bip_fem_auto_detect;
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u8 tx_bip_fem_manufacturer;
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u8 general_settings;
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u8 sr_state;
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u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
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u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
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u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
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} __packed;
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#define WL128X_INI_MAX_SETTINGS_PARAM 4
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struct wl128x_ini_general_params {
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u8 ref_clock;
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u8 settling_time;
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u8 clk_valid_on_wakeup;
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u8 tcxo_ref_clock;
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u8 tcxo_settling_time;
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u8 tcxo_valid_on_wakeup;
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u8 tcxo_ldo_voltage;
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u8 xtal_itrim_val;
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u8 platform_conf;
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u8 dual_mode_select;
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u8 tx_bip_fem_auto_detect;
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u8 tx_bip_fem_manufacturer;
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u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
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u8 sr_state;
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u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
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u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
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u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
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} __packed;
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#define WL1271_INI_RSSI_PROCESS_COMPENS_SIZE 15
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struct wl1271_ini_band_params_2 {
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u8 rx_trace_insertion_loss;
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u8 tx_trace_loss;
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u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
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} __packed;
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#define WL1271_INI_CHANNEL_COUNT_2 14
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struct wl128x_ini_band_params_2 {
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u8 rx_trace_insertion_loss;
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u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
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u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
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} __packed;
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#define WL1271_INI_RATE_GROUP_COUNT 6
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struct wl1271_ini_fem_params_2 {
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__le16 tx_bip_ref_pd_voltage;
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u8 tx_bip_ref_power;
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u8 tx_bip_ref_offset;
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u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
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u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
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u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
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u8 rx_fem_insertion_loss;
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u8 degraded_low_to_normal_thr;
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u8 normal_to_degraded_high_thr;
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} __packed;
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#define WL128X_INI_RATE_GROUP_COUNT 7
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/* low and high temperatures */
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#define WL128X_INI_PD_VS_TEMPERATURE_RANGES 2
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struct wl128x_ini_fem_params_2 {
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__le16 tx_bip_ref_pd_voltage;
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u8 tx_bip_ref_power;
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u8 tx_bip_ref_offset;
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u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
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u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
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u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
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u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
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u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
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u8 rx_fem_insertion_loss;
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u8 degraded_low_to_normal_thr;
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u8 normal_to_degraded_high_thr;
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} __packed;
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#define WL1271_INI_CHANNEL_COUNT_5 35
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#define WL1271_INI_SUB_BAND_COUNT_5 7
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struct wl1271_ini_band_params_5 {
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u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
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u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
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} __packed;
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struct wl128x_ini_band_params_5 {
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u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
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u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
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} __packed;
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struct wl1271_ini_fem_params_5 {
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__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
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u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
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u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
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u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
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u8 degraded_low_to_normal_thr;
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u8 normal_to_degraded_high_thr;
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} __packed;
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struct wl128x_ini_fem_params_5 {
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__le16 tx_bip_ref_pd_voltage[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
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u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
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u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
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u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
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u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
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WL128X_INI_PD_VS_TEMPERATURE_RANGES];
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u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
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u8 degraded_low_to_normal_thr;
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u8 normal_to_degraded_high_thr;
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} __packed;
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/* NVS data structure */
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#define WL1271_INI_NVS_SECTION_SIZE 468
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#define WL1271_INI_FEM_MODULE_COUNT 2
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#define WL1271_INI_LEGACY_NVS_FILE_SIZE 800
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struct wl1271_nvs_file {
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/* NVS section - must be first! */
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u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
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/* INI section */
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struct wl1271_ini_general_params general_params;
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u8 padding1;
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struct wl1271_ini_band_params_2 stat_radio_params_2;
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u8 padding2;
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struct {
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struct wl1271_ini_fem_params_2 params;
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u8 padding;
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} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
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struct wl1271_ini_band_params_5 stat_radio_params_5;
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u8 padding3;
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struct {
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struct wl1271_ini_fem_params_5 params;
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u8 padding;
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} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
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} __packed;
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struct wl128x_nvs_file {
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/* NVS section - must be first! */
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u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
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/* INI section */
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struct wl128x_ini_general_params general_params;
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u8 fem_vendor_and_options;
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struct wl128x_ini_band_params_2 stat_radio_params_2;
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u8 padding2;
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struct {
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struct wl128x_ini_fem_params_2 params;
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u8 padding;
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} dyn_radio_params_2[WL1271_INI_FEM_MODULE_COUNT];
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struct wl128x_ini_band_params_5 stat_radio_params_5;
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u8 padding3;
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struct {
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struct wl128x_ini_fem_params_5 params;
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u8 padding;
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} dyn_radio_params_5[WL1271_INI_FEM_MODULE_COUNT];
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} __packed;
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#endif
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