mirror of
https://github.com/AuxXxilium/linux_dsm_epyc7002.git
synced 2024-12-03 12:26:44 +07:00
d2168146c2
A number of board files in arch/arm and arch/unicore32 explicitly reference platform_bus device as a parent for new platform devices. This is unnecessary, as platform device API guarantees that devices with NULL parent are going to by adopted by the mentioned "root" device. This patch removes or replaces with NULL such references. Signed-off-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
375 lines
12 KiB
C
375 lines
12 KiB
C
/*
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* linux/arch/arm/mach-clps711x/p720t.c
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*
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* Copyright (C) 2000-2001 Deep Blue Solutions Ltd
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/leds.h>
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#include <linux/sizes.h>
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#include <linux/backlight.h>
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#include <linux/basic_mmio_gpio.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/nand-gpio.h>
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#include <mach/hardware.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <video/platform_lcd.h>
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#include "common.h"
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#include "devices.h"
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#define P720T_USERLED CLPS711X_GPIO(3, 0)
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#define P720T_NAND_CLE CLPS711X_GPIO(4, 0)
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#define P720T_NAND_ALE CLPS711X_GPIO(4, 1)
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#define P720T_NAND_NCE CLPS711X_GPIO(4, 2)
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#define P720T_NAND_BASE (CLPS711X_SDRAM1_BASE)
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#define P720T_MMGPIO_BASE (CLPS711X_NR_GPIO)
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#define SYSPLD_PHYS_BASE IOMEM(CS1_PHYS_BASE)
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#define PLD_INT (SYSPLD_PHYS_BASE + 0x000000)
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#define PLD_INT_MMGPIO_BASE (P720T_MMGPIO_BASE + 0)
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#define PLD_INT_PENIRQ (PLD_INT_MMGPIO_BASE + 5)
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#define PLD_INT_UCB_IRQ (PLD_INT_MMGPIO_BASE + 1)
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#define PLD_INT_KBD_ATN (PLD_INT_MMGPIO_BASE + 0) /* EINT1 */
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#define PLD_PWR (SYSPLD_PHYS_BASE + 0x000004)
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#define PLD_PWR_MMGPIO_BASE (P720T_MMGPIO_BASE + 8)
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#define PLD_PWR_EXT (PLD_PWR_MMGPIO_BASE + 5)
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#define PLD_PWR_MODE (PLD_PWR_MMGPIO_BASE + 4) /* 1 = PWM, 0 = PFM */
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#define PLD_S4_ON (PLD_PWR_MMGPIO_BASE + 3) /* LCD bias voltage enable */
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#define PLD_S3_ON (PLD_PWR_MMGPIO_BASE + 2) /* LCD backlight enable */
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#define PLD_S2_ON (PLD_PWR_MMGPIO_BASE + 1) /* LCD 3V3 supply enable */
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#define PLD_S1_ON (PLD_PWR_MMGPIO_BASE + 0) /* LCD 3V supply enable */
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#define PLD_KBD (SYSPLD_PHYS_BASE + 0x000008)
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#define PLD_KBD_MMGPIO_BASE (P720T_MMGPIO_BASE + 16)
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#define PLD_KBD_WAKE (PLD_KBD_MMGPIO_BASE + 1)
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#define PLD_KBD_EN (PLD_KBD_MMGPIO_BASE + 0)
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#define PLD_SPI (SYSPLD_PHYS_BASE + 0x00000c)
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#define PLD_SPI_MMGPIO_BASE (P720T_MMGPIO_BASE + 24)
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#define PLD_SPI_EN (PLD_SPI_MMGPIO_BASE + 0)
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#define PLD_IO (SYSPLD_PHYS_BASE + 0x000010)
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#define PLD_IO_MMGPIO_BASE (P720T_MMGPIO_BASE + 32)
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#define PLD_IO_BOOTSEL (PLD_IO_MMGPIO_BASE + 6) /* Boot sel switch */
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#define PLD_IO_USER (PLD_IO_MMGPIO_BASE + 5) /* User defined switch */
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#define PLD_IO_LED3 (PLD_IO_MMGPIO_BASE + 4)
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#define PLD_IO_LED2 (PLD_IO_MMGPIO_BASE + 3)
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#define PLD_IO_LED1 (PLD_IO_MMGPIO_BASE + 2)
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#define PLD_IO_LED0 (PLD_IO_MMGPIO_BASE + 1)
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#define PLD_IO_LEDEN (PLD_IO_MMGPIO_BASE + 0)
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#define PLD_IRDA (SYSPLD_PHYS_BASE + 0x000014)
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#define PLD_IRDA_MMGPIO_BASE (P720T_MMGPIO_BASE + 40)
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#define PLD_IRDA_EN (PLD_IRDA_MMGPIO_BASE + 0)
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#define PLD_COM2 (SYSPLD_PHYS_BASE + 0x000018)
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#define PLD_COM2_MMGPIO_BASE (P720T_MMGPIO_BASE + 48)
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#define PLD_COM2_EN (PLD_COM2_MMGPIO_BASE + 0)
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#define PLD_COM1 (SYSPLD_PHYS_BASE + 0x00001c)
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#define PLD_COM1_MMGPIO_BASE (P720T_MMGPIO_BASE + 56)
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#define PLD_COM1_EN (PLD_COM1_MMGPIO_BASE + 0)
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#define PLD_AUD (SYSPLD_PHYS_BASE + 0x000020)
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#define PLD_AUD_MMGPIO_BASE (P720T_MMGPIO_BASE + 64)
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#define PLD_AUD_DIV1 (PLD_AUD_MMGPIO_BASE + 6)
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#define PLD_AUD_DIV0 (PLD_AUD_MMGPIO_BASE + 5)
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#define PLD_AUD_CLK_SEL1 (PLD_AUD_MMGPIO_BASE + 4)
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#define PLD_AUD_CLK_SEL0 (PLD_AUD_MMGPIO_BASE + 3)
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#define PLD_AUD_MIC_PWR (PLD_AUD_MMGPIO_BASE + 2)
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#define PLD_AUD_MIC_GAIN (PLD_AUD_MMGPIO_BASE + 1)
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#define PLD_AUD_CODEC_EN (PLD_AUD_MMGPIO_BASE + 0)
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#define PLD_CF (SYSPLD_PHYS_BASE + 0x000024)
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#define PLD_CF_MMGPIO_BASE (P720T_MMGPIO_BASE + 72)
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#define PLD_CF2_SLEEP (PLD_CF_MMGPIO_BASE + 5)
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#define PLD_CF1_SLEEP (PLD_CF_MMGPIO_BASE + 4)
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#define PLD_CF2_nPDREQ (PLD_CF_MMGPIO_BASE + 3)
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#define PLD_CF1_nPDREQ (PLD_CF_MMGPIO_BASE + 2)
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#define PLD_CF2_nIRQ (PLD_CF_MMGPIO_BASE + 1)
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#define PLD_CF1_nIRQ (PLD_CF_MMGPIO_BASE + 0)
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#define PLD_SDC (SYSPLD_PHYS_BASE + 0x000028)
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#define PLD_SDC_MMGPIO_BASE (P720T_MMGPIO_BASE + 80)
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#define PLD_SDC_INT_EN (PLD_SDC_MMGPIO_BASE + 2)
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#define PLD_SDC_WP (PLD_SDC_MMGPIO_BASE + 1)
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#define PLD_SDC_CD (PLD_SDC_MMGPIO_BASE + 0)
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#define PLD_CODEC (SYSPLD_PHYS_BASE + 0x400000)
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#define PLD_CODEC_MMGPIO_BASE (P720T_MMGPIO_BASE + 88)
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#define PLD_CODEC_IRQ3 (PLD_CODEC_MMGPIO_BASE + 4)
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#define PLD_CODEC_IRQ2 (PLD_CODEC_MMGPIO_BASE + 3)
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#define PLD_CODEC_IRQ1 (PLD_CODEC_MMGPIO_BASE + 2)
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#define PLD_CODEC_EN (PLD_CODEC_MMGPIO_BASE + 0)
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#define PLD_BRITE (SYSPLD_PHYS_BASE + 0x400004)
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#define PLD_BRITE_MMGPIO_BASE (P720T_MMGPIO_BASE + 96)
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#define PLD_BRITE_UP (PLD_BRITE_MMGPIO_BASE + 1)
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#define PLD_BRITE_DN (PLD_BRITE_MMGPIO_BASE + 0)
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#define PLD_LCDEN (SYSPLD_PHYS_BASE + 0x400008)
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#define PLD_LCDEN_MMGPIO_BASE (P720T_MMGPIO_BASE + 104)
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#define PLD_LCDEN_EN (PLD_LCDEN_MMGPIO_BASE + 0)
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#define PLD_TCH (SYSPLD_PHYS_BASE + 0x400010)
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#define PLD_TCH_MMGPIO_BASE (P720T_MMGPIO_BASE + 112)
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#define PLD_TCH_PENIRQ (PLD_TCH_MMGPIO_BASE + 1)
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#define PLD_TCH_EN (PLD_TCH_MMGPIO_BASE + 0)
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#define PLD_GPIO (SYSPLD_PHYS_BASE + 0x400014)
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#define PLD_GPIO_MMGPIO_BASE (P720T_MMGPIO_BASE + 120)
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#define PLD_GPIO2 (PLD_GPIO_MMGPIO_BASE + 2)
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#define PLD_GPIO1 (PLD_GPIO_MMGPIO_BASE + 1)
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#define PLD_GPIO0 (PLD_GPIO_MMGPIO_BASE + 0)
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static struct gpio p720t_gpios[] __initconst = {
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{ PLD_S1_ON, GPIOF_OUT_INIT_LOW, "PLD_S1_ON" },
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{ PLD_S2_ON, GPIOF_OUT_INIT_LOW, "PLD_S2_ON" },
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{ PLD_S3_ON, GPIOF_OUT_INIT_LOW, "PLD_S3_ON" },
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{ PLD_S4_ON, GPIOF_OUT_INIT_LOW, "PLD_S4_ON" },
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{ PLD_KBD_EN, GPIOF_OUT_INIT_LOW, "PLD_KBD_EN" },
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{ PLD_SPI_EN, GPIOF_OUT_INIT_LOW, "PLD_SPI_EN" },
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{ PLD_IO_USER, GPIOF_OUT_INIT_LOW, "PLD_IO_USER" },
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{ PLD_IO_LED0, GPIOF_OUT_INIT_LOW, "PLD_IO_LED0" },
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{ PLD_IO_LED1, GPIOF_OUT_INIT_LOW, "PLD_IO_LED1" },
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{ PLD_IO_LED2, GPIOF_OUT_INIT_LOW, "PLD_IO_LED2" },
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{ PLD_IO_LED3, GPIOF_OUT_INIT_LOW, "PLD_IO_LED3" },
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{ PLD_IO_LEDEN, GPIOF_OUT_INIT_LOW, "PLD_IO_LEDEN" },
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{ PLD_IRDA_EN, GPIOF_OUT_INIT_LOW, "PLD_IRDA_EN" },
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{ PLD_COM1_EN, GPIOF_OUT_INIT_HIGH, "PLD_COM1_EN" },
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{ PLD_COM2_EN, GPIOF_OUT_INIT_HIGH, "PLD_COM2_EN" },
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{ PLD_CODEC_EN, GPIOF_OUT_INIT_LOW, "PLD_CODEC_EN" },
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{ PLD_LCDEN_EN, GPIOF_OUT_INIT_LOW, "PLD_LCDEN_EN" },
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{ PLD_TCH_EN, GPIOF_OUT_INIT_LOW, "PLD_TCH_EN" },
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{ P720T_USERLED,GPIOF_OUT_INIT_LOW, "USER_LED" },
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};
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static struct resource p720t_mmgpio_resource[] __initdata = {
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DEFINE_RES_MEM_NAMED(0, 4, "dat"),
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};
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static struct bgpio_pdata p720t_mmgpio_pdata = {
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.ngpio = 8,
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};
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static struct platform_device p720t_mmgpio __initdata = {
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.name = "basic-mmio-gpio",
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.id = -1,
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.resource = p720t_mmgpio_resource,
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.num_resources = ARRAY_SIZE(p720t_mmgpio_resource),
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.dev = {
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.platform_data = &p720t_mmgpio_pdata,
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},
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};
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static void __init p720t_mmgpio_init(void __iomem *addrbase, int gpiobase)
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{
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p720t_mmgpio_resource[0].start = (unsigned long)addrbase;
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p720t_mmgpio_pdata.base = gpiobase;
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platform_device_register(&p720t_mmgpio);
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}
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static struct {
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void __iomem *addrbase;
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int gpiobase;
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} mmgpios[] __initconst = {
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{ PLD_INT, PLD_INT_MMGPIO_BASE },
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{ PLD_PWR, PLD_PWR_MMGPIO_BASE },
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{ PLD_KBD, PLD_KBD_MMGPIO_BASE },
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{ PLD_SPI, PLD_SPI_MMGPIO_BASE },
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{ PLD_IO, PLD_IO_MMGPIO_BASE },
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{ PLD_IRDA, PLD_IRDA_MMGPIO_BASE },
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{ PLD_COM2, PLD_COM2_MMGPIO_BASE },
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{ PLD_COM1, PLD_COM1_MMGPIO_BASE },
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{ PLD_AUD, PLD_AUD_MMGPIO_BASE },
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{ PLD_CF, PLD_CF_MMGPIO_BASE },
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{ PLD_SDC, PLD_SDC_MMGPIO_BASE },
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{ PLD_CODEC, PLD_CODEC_MMGPIO_BASE },
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{ PLD_BRITE, PLD_BRITE_MMGPIO_BASE },
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{ PLD_LCDEN, PLD_LCDEN_MMGPIO_BASE },
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{ PLD_TCH, PLD_TCH_MMGPIO_BASE },
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{ PLD_GPIO, PLD_GPIO_MMGPIO_BASE },
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};
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static struct resource p720t_nand_resource[] __initdata = {
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DEFINE_RES_MEM(P720T_NAND_BASE, SZ_4),
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};
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static struct mtd_partition p720t_nand_parts[] __initdata = {
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{
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.name = "Flash partition 1",
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.offset = 0,
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.size = SZ_2M,
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},
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{
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.name = "Flash partition 2",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct gpio_nand_platdata p720t_nand_pdata __initdata = {
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.gpio_rdy = -1,
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.gpio_nce = P720T_NAND_NCE,
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.gpio_ale = P720T_NAND_ALE,
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.gpio_cle = P720T_NAND_CLE,
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.gpio_nwp = -1,
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.chip_delay = 15,
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.parts = p720t_nand_parts,
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.num_parts = ARRAY_SIZE(p720t_nand_parts),
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};
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static struct platform_device p720t_nand_pdev __initdata = {
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.name = "gpio-nand",
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.id = -1,
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.resource = p720t_nand_resource,
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.num_resources = ARRAY_SIZE(p720t_nand_resource),
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.dev = {
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.platform_data = &p720t_nand_pdata,
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},
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};
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static void p720t_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
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{
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if (power) {
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gpio_set_value(PLD_LCDEN_EN, 1);
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gpio_set_value(PLD_S1_ON, 1);
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gpio_set_value(PLD_S2_ON, 1);
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gpio_set_value(PLD_S4_ON, 1);
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} else {
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gpio_set_value(PLD_S1_ON, 0);
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gpio_set_value(PLD_S2_ON, 0);
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gpio_set_value(PLD_S4_ON, 0);
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gpio_set_value(PLD_LCDEN_EN, 0);
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}
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}
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static struct plat_lcd_data p720t_lcd_power_pdata = {
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.set_power = p720t_lcd_power_set,
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};
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static void p720t_lcd_backlight_set_intensity(int intensity)
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{
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gpio_set_value(PLD_S3_ON, intensity);
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}
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static struct generic_bl_info p720t_lcd_backlight_pdata = {
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.name = "lcd-backlight.0",
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.default_intensity = 0x01,
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.max_intensity = 0x01,
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.set_bl_intensity = p720t_lcd_backlight_set_intensity,
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};
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static void __init
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fixup_p720t(struct tag *tag, char **cmdline)
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{
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/*
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* Our bootloader doesn't setup any tags (yet).
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*/
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if (tag->hdr.tag != ATAG_CORE) {
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tag->hdr.tag = ATAG_CORE;
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tag->hdr.size = tag_size(tag_core);
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tag->u.core.flags = 0;
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tag->u.core.pagesize = PAGE_SIZE;
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tag->u.core.rootdev = 0x0100;
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tag = tag_next(tag);
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tag->hdr.tag = ATAG_MEM;
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tag->hdr.size = tag_size(tag_mem32);
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tag->u.mem.size = 4096;
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tag->u.mem.start = PHYS_OFFSET;
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tag = tag_next(tag);
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tag->hdr.tag = ATAG_NONE;
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tag->hdr.size = 0;
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}
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}
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static struct gpio_led p720t_gpio_leds[] = {
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{
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.name = "User LED",
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.default_trigger = "heartbeat",
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.gpio = P720T_USERLED,
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},
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};
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static struct gpio_led_platform_data p720t_gpio_led_pdata __initdata = {
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.leds = p720t_gpio_leds,
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.num_leds = ARRAY_SIZE(p720t_gpio_leds),
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};
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static void __init p720t_init(void)
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{
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int i;
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clps711x_devices_init();
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for (i = 0; i < ARRAY_SIZE(mmgpios); i++)
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p720t_mmgpio_init(mmgpios[i].addrbase, mmgpios[i].gpiobase);
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platform_device_register(&p720t_nand_pdev);
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}
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static void __init p720t_init_late(void)
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{
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WARN_ON(gpio_request_array(p720t_gpios, ARRAY_SIZE(p720t_gpios)));
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platform_device_register_data(NULL, "platform-lcd", 0,
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&p720t_lcd_power_pdata,
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sizeof(p720t_lcd_power_pdata));
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platform_device_register_data(NULL, "generic-bl", 0,
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&p720t_lcd_backlight_pdata,
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sizeof(p720t_lcd_backlight_pdata));
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platform_device_register_simple("video-clps711x", 0, NULL, 0);
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platform_device_register_data(NULL, "leds-gpio", 0,
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&p720t_gpio_led_pdata,
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sizeof(p720t_gpio_led_pdata));
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}
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MACHINE_START(P720T, "ARM-Prospector720T")
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/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
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.atag_offset = 0x100,
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.fixup = fixup_p720t,
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.map_io = clps711x_map_io,
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.init_early = clps711x_init_early,
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.init_irq = clps711x_init_irq,
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.init_time = clps711x_timer_init,
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.init_machine = p720t_init,
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.init_late = p720t_init_late,
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.restart = clps711x_restart,
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MACHINE_END
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